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Reginald Glenwood Bragdon

Supervisory Patent Examiner (ID: 2283, Phone: (571)272-4204 , Office: P/2139 )

Most Active Art Unit
2751
Art Unit(s)
2189, 2188, 2312, 2751, 2186, 2139, 2185, 2787
Total Applications
790
Issued Applications
531
Pending Applications
75
Abandoned Applications
191

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1314476 [patent_doc_number] => 06622226 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method and system for using a mark-list for garbage collection' [patent_app_type] => B1 [patent_app_number] => 09/628879 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6174 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/622/06622226.pdf [firstpage_image] =>[orig_patent_app_number] => 09628879 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/628879
Method and system for using a mark-list for garbage collection Jul 30, 2000 Issued
Array ( [id] => 981637 [patent_doc_number] => 06931510 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'Method and system for translation lookaside buffer coherence in multiprocessor systems' [patent_app_type] => utility [patent_app_number] => 09/629085 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2940 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931510.pdf [firstpage_image] =>[orig_patent_app_number] => 09629085 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/629085
Method and system for translation lookaside buffer coherence in multiprocessor systems Jul 30, 2000 Issued
Array ( [id] => 1186668 [patent_doc_number] => 06738875 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Efficient write-watch mechanism useful for garbage collection in a computer system' [patent_app_type] => B1 [patent_app_number] => 09/628708 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5960 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738875.pdf [firstpage_image] =>[orig_patent_app_number] => 09628708 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/628708
Efficient write-watch mechanism useful for garbage collection in a computer system Jul 30, 2000 Issued
Array ( [id] => 7631565 [patent_doc_number] => 06665772 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Data storage method and device for storing streaming and non-streaming data in common memory space' [patent_app_type] => B1 [patent_app_number] => 09/628581 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 2 [patent_no_of_words] => 6671 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665772.pdf [firstpage_image] =>[orig_patent_app_number] => 09628581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/628581
Data storage method and device for storing streaming and non-streaming data in common memory space Jul 30, 2000 Issued
Array ( [id] => 1116619 [patent_doc_number] => 06804762 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Method and system for garbage collection using a dynamically tuned write barrier' [patent_app_type] => B1 [patent_app_number] => 09/628610 [patent_app_country] => US [patent_app_date] => 2000-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7509 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/804/06804762.pdf [firstpage_image] =>[orig_patent_app_number] => 09628610 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/628610
Method and system for garbage collection using a dynamically tuned write barrier Jul 30, 2000 Issued
Array ( [id] => 7621159 [patent_doc_number] => 06978342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-20 [patent_title] => 'Moving sectors within a block of information in a flash memory mass storage architecture' [patent_app_type] => utility [patent_app_number] => 09/620544 [patent_app_country] => US [patent_app_date] => 2000-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 11251 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978342.pdf [firstpage_image] =>[orig_patent_app_number] => 09620544 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620544
Moving sectors within a block of information in a flash memory mass storage architecture Jul 20, 2000 Issued
Array ( [id] => 1552821 [patent_doc_number] => 06446158 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Memory system using FET switches to select memory banks' [patent_app_type] => B1 [patent_app_number] => 09/572641 [patent_app_country] => US [patent_app_date] => 2000-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 5788 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446158.pdf [firstpage_image] =>[orig_patent_app_number] => 09572641 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/572641
Memory system using FET switches to select memory banks May 16, 2000 Issued
Array ( [id] => 1557492 [patent_doc_number] => 06401162 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Generalized fourier transform processing system' [patent_app_type] => B1 [patent_app_number] => 09/547956 [patent_app_country] => US [patent_app_date] => 2000-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 8009 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401162.pdf [firstpage_image] =>[orig_patent_app_number] => 09547956 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/547956
Generalized fourier transform processing system Apr 11, 2000 Issued
Array ( [id] => 1196922 [patent_doc_number] => 06732223 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Method and apparatus for address FIFO for high-bandwidth command/address busses in digital storage system' [patent_app_type] => B1 [patent_app_number] => 09/541732 [patent_app_country] => US [patent_app_date] => 2000-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4258 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732223.pdf [firstpage_image] =>[orig_patent_app_number] => 09541732 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/541732
Method and apparatus for address FIFO for high-bandwidth command/address busses in digital storage system Apr 2, 2000 Issued
Array ( [id] => 1602220 [patent_doc_number] => 06493788 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Processor with embedded in-circuit programming structures' [patent_app_type] => B1 [patent_app_number] => 09/525835 [patent_app_country] => US [patent_app_date] => 2000-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5341 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493788.pdf [firstpage_image] =>[orig_patent_app_number] => 09525835 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/525835
Processor with embedded in-circuit programming structures Mar 14, 2000 Issued
09/256268 Method and apparatus for determining a longest prefix match in a content addressablememory device Mar 13, 2000 Abandoned
Array ( [id] => 4424714 [patent_doc_number] => 06230234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Direct logical block addressing flash memory mass storage architecture' [patent_app_type] => 1 [patent_app_number] => 9/521420 [patent_app_country] => US [patent_app_date] => 2000-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3983 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230234.pdf [firstpage_image] =>[orig_patent_app_number] => 521420 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/521420
Direct logical block addressing flash memory mass storage architecture Mar 7, 2000 Issued
Array ( [id] => 4271019 [patent_doc_number] => 06223308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Identification and verification of a sector within a block of mass STO rage flash memory' [patent_app_type] => 1 [patent_app_number] => 9/520903 [patent_app_country] => US [patent_app_date] => 2000-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 26 [patent_no_of_words] => 13143 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/223/06223308.pdf [firstpage_image] =>[orig_patent_app_number] => 520903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/520903
Identification and verification of a sector within a block of mass STO rage flash memory Mar 6, 2000 Issued
Array ( [id] => 1539113 [patent_doc_number] => 06412038 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Integral modular cache for a processor' [patent_app_type] => B1 [patent_app_number] => 09/503986 [patent_app_country] => US [patent_app_date] => 2000-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3703 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/412/06412038.pdf [firstpage_image] =>[orig_patent_app_number] => 09503986 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/503986
Integral modular cache for a processor Feb 13, 2000 Issued
Array ( [id] => 4325476 [patent_doc_number] => 06253293 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Methods for processing audio information in a multiple processor audio decoder' [patent_app_type] => 1 [patent_app_number] => 9/483290 [patent_app_country] => US [patent_app_date] => 2000-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 8760 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/253/06253293.pdf [firstpage_image] =>[orig_patent_app_number] => 483290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/483290
Methods for processing audio information in a multiple processor audio decoder Jan 13, 2000 Issued
Array ( [id] => 1481033 [patent_doc_number] => 06389507 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Memory device search system and method' [patent_app_type] => B1 [patent_app_number] => 09/483206 [patent_app_country] => US [patent_app_date] => 2000-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8913 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389507.pdf [firstpage_image] =>[orig_patent_app_number] => 09483206 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/483206
Memory device search system and method Jan 13, 2000 Issued
Array ( [id] => 1456748 [patent_doc_number] => 06457101 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'System and method for providing the speculative return of cached data within a hierarchical memory system' [patent_app_type] => B1 [patent_app_number] => 09/468050 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 14760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/457/06457101.pdf [firstpage_image] =>[orig_patent_app_number] => 09468050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/468050
System and method for providing the speculative return of cached data within a hierarchical memory system Dec 19, 1999 Issued
Array ( [id] => 1337024 [patent_doc_number] => 06604166 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-05 [patent_title] => 'Memory architecture for parallel data access along any given dimension of an n-dimensional rectangular data array' [patent_app_type] => B1 [patent_app_number] => 09/467505 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5927 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/604/06604166.pdf [firstpage_image] =>[orig_patent_app_number] => 09467505 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/467505
Memory architecture for parallel data access along any given dimension of an n-dimensional rectangular data array Dec 19, 1999 Issued
Array ( [id] => 1409398 [patent_doc_number] => 06557079 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-29 [patent_title] => 'Remote data facility prefetch' [patent_app_type] => B1 [patent_app_number] => 09/468270 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7078 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/557/06557079.pdf [firstpage_image] =>[orig_patent_app_number] => 09468270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/468270
Remote data facility prefetch Dec 19, 1999 Issued
Array ( [id] => 1602228 [patent_doc_number] => 06493791 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Prioritized content addressable memory' [patent_app_type] => B1 [patent_app_number] => 09/466968 [patent_app_country] => US [patent_app_date] => 1999-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4761 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493791.pdf [firstpage_image] =>[orig_patent_app_number] => 09466968 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/466968
Prioritized content addressable memory Dec 19, 1999 Issued
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