
Reginald Glenwood Bragdon
Supervisory Patent Examiner (ID: 2283, Phone: (571)272-4204 , Office: P/2139 )
| Most Active Art Unit | 2751 |
| Art Unit(s) | 2189, 2188, 2312, 2751, 2186, 2139, 2185, 2787 |
| Total Applications | 790 |
| Issued Applications | 531 |
| Pending Applications | 75 |
| Abandoned Applications | 191 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4010997
[patent_doc_number] => 05920885
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-06
[patent_title] => 'Dynamic random access memory with a normal precharge mode and a priority precharge mode'
[patent_app_type] => 1
[patent_app_number] => 9/088535
[patent_app_country] => US
[patent_app_date] => 1998-06-01
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[pdf_file] => patents/05/920/05920885.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/088535 | Dynamic random access memory with a normal precharge mode and a priority precharge mode | May 31, 1998 | Issued |
Array
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[patent_doc_number] => 05924113
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[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Direct logical block addressing flash memory mass storage architecture'
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[patent_app_number] => 9/087720
[patent_app_country] => US
[patent_app_date] => 1998-05-29
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Array
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[patent_title] => 'Circuit for receiving a command word for accessing a secure subkey'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/074040 | Circuit for receiving a command word for accessing a secure subkey | May 6, 1998 | Issued |
Array
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[patent_title] => 'Method for storing and updating information describing data traffic on a network'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/066803 | Method for storing and updating information describing data traffic on a network | Apr 23, 1998 | Issued |
Array
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Array
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[patent_title] => 'Stack cache miss handling'
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/063012 | Disk array device for ensuring stable operation when a constituent disk device is replaced | Apr 20, 1998 | Issued |
Array
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[patent_title] => 'Device and method for controlling write-back of data in a cache memory connected to a storage'
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Array
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[id] => 3955199
[patent_doc_number] => 05940855
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Array
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[patent_app_number] => 9/048577
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/048577 | Hierarchical cache system flushing scheme based on monitoring and decoding processor bus cycles for flush/clear sequence control | Mar 25, 1998 | Issued |
| 08/981032 | PERSONAL COMPUTER WITH AT LEAST ONE FLOPPY DISK DRIVE | Mar 16, 1998 | Abandoned |
Array
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Array
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Array
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Array
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