| Application number | Title of the application | Filing Date | Status |
|---|
| 08/563137 | INFORMATION PROCESSING SYSTEM HAVING MULTIPLE MODULES AND A MEMORY ON A BUS, WHERE ANY MODULE CAN LOCK AN ADDRESSABLE PORTION OF THE MEMORY BY SENDING RETRY SIGNALS TO OTHER MODULES THAT TRY TO READ AT THE LOCKER ADDRESS | Nov 26, 1995 | Abandoned |
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| 08/560868 | MEMORY CONTROL DEVICE AND MEMORY DATA SEARCH CIRCUIT | Nov 19, 1995 | Abandoned |
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Array
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| 08/507962 | PROTOCOL FOR ARBITRATING ACCESS TO A SHARED MEMORY AREA USING HISTORICAL STATE INFORMATION | Jul 26, 1995 | Abandoned |
Array
(
[id] => 3621256
[patent_doc_number] => 05590302
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[patent_kind] => NA
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| 08/485989 | AUTONOMOUS HIGH SPEED ADDRESS TRANSLATION WITH DEFECT MANAGEMENT FOR HARD DISC DRIVES | Jun 6, 1995 | Abandoned |
Array
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Array
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[patent_kind] => NA
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| 08/474630 | MEMORY SYSTEM HAVING AN ADDRESS SEQUENCER AND METHOD OF OPERATING SAME | Jun 5, 1995 | Abandoned |