Search

Rei Tsang Shiao

Examiner (ID: 6494, Phone: (571)272-0707 , Office: P/1628 )

Most Active Art Unit
1628
Art Unit(s)
1628, 1626, 1629
Total Applications
2891
Issued Applications
2072
Pending Applications
163
Abandoned Applications
656

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7247298 [patent_doc_number] => 20040158788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'Method for functional verification of an integrated circuit model in order to create a verification platform, equipment emulator and verification platform' [patent_app_type] => new [patent_app_number] => 10/627976 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20040158788.pdf [firstpage_image] =>[orig_patent_app_number] => 10627976 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/627976
Method for functional verification of an integrated circuit model in order to create a verification platform, equipment emulator and verification platform Jul 27, 2003 Abandoned
Array ( [id] => 7271459 [patent_doc_number] => 20040059977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Method of processing test patterns for an integrated circuit' [patent_app_type] => new [patent_app_number] => 10/622933 [patent_app_country] => US [patent_app_date] => 2003-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8114 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20040059977.pdf [firstpage_image] =>[orig_patent_app_number] => 10622933 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/622933
Method of processing test patterns for an integrated circuit Jul 17, 2003 Abandoned
Array ( [id] => 125930 [patent_doc_number] => 07711535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-04 [patent_title] => 'Simulation of hardware and software' [patent_app_type] => utility [patent_app_number] => 10/618284 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3095 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711535.pdf [firstpage_image] =>[orig_patent_app_number] => 10618284 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/618284
Simulation of hardware and software Jul 10, 2003 Issued
Array ( [id] => 7413593 [patent_doc_number] => 20040025127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-05 [patent_title] => 'Logic verification and logic cone extraction technique' [patent_app_type] => new [patent_app_number] => 10/612193 [patent_app_country] => US [patent_app_date] => 2003-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20040025127.pdf [firstpage_image] =>[orig_patent_app_number] => 10612193 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/612193
Logic verification and logic cone extraction technique Jul 2, 2003 Issued
Array ( [id] => 136795 [patent_doc_number] => 07698115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'System and method for dynamically allocating resources in a client/server environment' [patent_app_type] => utility [patent_app_number] => 10/611437 [patent_app_country] => US [patent_app_date] => 2003-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4305 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/698/07698115.pdf [firstpage_image] =>[orig_patent_app_number] => 10611437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/611437
System and method for dynamically allocating resources in a client/server environment Jun 29, 2003 Issued
Array ( [id] => 7292648 [patent_doc_number] => 20040111252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Method and system for emulating a design under test associated with a test environment' [patent_app_type] => new [patent_app_number] => 10/603776 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11736 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20040111252.pdf [firstpage_image] =>[orig_patent_app_number] => 10603776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/603776
Method and system for emulating a design under test associated with a test environment Jun 25, 2003 Abandoned
Array ( [id] => 7021565 [patent_doc_number] => 20050223191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Device comprising a communications stack with a scheduler' [patent_app_type] => utility [patent_app_number] => 10/515657 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10792 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20050223191.pdf [firstpage_image] =>[orig_patent_app_number] => 10515657 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/515657
Device comprising a communications stack with a scheduler May 26, 2003 Abandoned
Array ( [id] => 7390835 [patent_doc_number] => 20040030417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Tracking systems for detecting sensor errors' [patent_app_type] => new [patent_app_number] => 10/416106 [patent_app_country] => US [patent_app_date] => 2003-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6596 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20040030417.pdf [firstpage_image] =>[orig_patent_app_number] => 10416106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/416106
Tracking systems for detecting sensor errors May 5, 2003 Abandoned
Array ( [id] => 7320420 [patent_doc_number] => 20040225489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Integrated self-testing of a reconfigurable interconnect' [patent_app_type] => new [patent_app_number] => 10/428917 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5221 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20040225489.pdf [firstpage_image] =>[orig_patent_app_number] => 10428917 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/428917
Integrated self-testing of a reconfigurable interconnect May 4, 2003 Abandoned
Array ( [id] => 117077 [patent_doc_number] => 07716024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Method and apparatus for electronically generating a color dental occlusion map within electronic model images' [patent_app_type] => utility [patent_app_number] => 10/426252 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5326 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/716/07716024.pdf [firstpage_image] =>[orig_patent_app_number] => 10426252 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426252
Method and apparatus for electronically generating a color dental occlusion map within electronic model images Apr 28, 2003 Issued
Array ( [id] => 6726033 [patent_doc_number] => 20030208345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Color matching and simulation of multicolor surfaces' [patent_app_type] => new [patent_app_number] => 10/423441 [patent_app_country] => US [patent_app_date] => 2003-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6247 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20030208345.pdf [firstpage_image] =>[orig_patent_app_number] => 10423441 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/423441
Color matching and simulation of multicolor surfaces Apr 24, 2003 Abandoned
Array ( [id] => 155768 [patent_doc_number] => 07680637 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-03-16 [patent_title] => 'Automated linearization analysis' [patent_app_type] => utility [patent_app_number] => 10/414645 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 34 [patent_no_of_words] => 21133 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/680/07680637.pdf [firstpage_image] =>[orig_patent_app_number] => 10414645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/414645
Automated linearization analysis Apr 15, 2003 Issued
Array ( [id] => 7351887 [patent_doc_number] => 20040193633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Systems, methods, and apparatus for automated dimensional model definitions and builds utilizing simplified analysis heuristics' [patent_app_type] => new [patent_app_number] => 10/402026 [patent_app_country] => US [patent_app_date] => 2003-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8712 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20040193633.pdf [firstpage_image] =>[orig_patent_app_number] => 10402026 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/402026
Systems, methods, and apparatus for automated dimensional model definitions and builds utilizing simplified analysis heuristics Mar 27, 2003 Abandoned
Array ( [id] => 7350741 [patent_doc_number] => 20040193394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Method for CPU simulation using virtual machine extensions' [patent_app_type] => new [patent_app_number] => 10/395557 [patent_app_country] => US [patent_app_date] => 2003-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2114 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20040193394.pdf [firstpage_image] =>[orig_patent_app_number] => 10395557 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/395557
Method for CPU simulation using virtual machine extensions Mar 23, 2003 Abandoned
Array ( [id] => 361966 [patent_doc_number] => 07487078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-03 [patent_title] => 'Method and system for modeling distributed time invariant systems' [patent_app_type] => utility [patent_app_number] => 10/326679 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8522 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/487/07487078.pdf [firstpage_image] =>[orig_patent_app_number] => 10326679 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/326679
Method and system for modeling distributed time invariant systems Dec 19, 2002 Issued
Array ( [id] => 6806011 [patent_doc_number] => 20030233405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Method and apparatus for manipulating data of a disc media' [patent_app_type] => new [patent_app_number] => 10/313093 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3953 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20030233405.pdf [firstpage_image] =>[orig_patent_app_number] => 10313093 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313093
Method and apparatus for manipulating data of a disc media Dec 4, 2002 Abandoned
Array ( [id] => 4972544 [patent_doc_number] => 20070112547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Method and system for integrated reservoir and surface facility networks simulations' [patent_app_type] => utility [patent_app_number] => 10/586283 [patent_app_country] => US [patent_app_date] => 2002-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8535 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20070112547.pdf [firstpage_image] =>[orig_patent_app_number] => 10586283 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/586283
Method and system for integrated reservoir and surface facility networks simulations Nov 22, 2002 Issued
Array ( [id] => 559940 [patent_doc_number] => 07165018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-16 [patent_title] => 'Address range comparator for detection of multi size memory accesses with data matching qualification and full or partial overlap' [patent_app_type] => utility [patent_app_number] => 10/301887 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/165/07165018.pdf [firstpage_image] =>[orig_patent_app_number] => 10301887 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301887
Address range comparator for detection of multi size memory accesses with data matching qualification and full or partial overlap Nov 21, 2002 Issued
Array ( [id] => 342967 [patent_doc_number] => 07502727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Tracing user change of program counter during stop event' [patent_app_type] => utility [patent_app_number] => 10/301886 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6227 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/502/07502727.pdf [firstpage_image] =>[orig_patent_app_number] => 10301886 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301886
Tracing user change of program counter during stop event Nov 21, 2002 Issued
Array ( [id] => 7472564 [patent_doc_number] => 20040102940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Integration of a discrete event simulation with a configurable software application' [patent_app_type] => new [patent_app_number] => 10/301788 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20040102940.pdf [firstpage_image] =>[orig_patent_app_number] => 10301788 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301788
Integration of a discrete event simulation with a configurable software application Nov 21, 2002 Abandoned
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