Search

Rene D. Ford

Examiner (ID: 17736, Phone: (571)272-8140 , Office: P/3741 )

Most Active Art Unit
3741
Art Unit(s)
3741
Total Applications
542
Issued Applications
408
Pending Applications
54
Abandoned Applications
93

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17530083 [patent_doc_number] => 11302784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Semiconductor device having contact feature and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 16/746618 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16746618 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/746618
Semiconductor device having contact feature and method of fabricating the same Jan 16, 2020 Issued
Array ( [id] => 16981529 [patent_doc_number] => 20210225766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => Butted Contacts and Methods of Fabricating the Same in Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 16/745716 [patent_app_country] => US [patent_app_date] => 2020-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16745716 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/745716
Butted contacts and methods of fabricating the same in semiconductor devices Jan 16, 2020 Issued
Array ( [id] => 16981820 [patent_doc_number] => 20210226057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => FIN FIELD EFFECT TRANSISTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/744480 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744480
Fin field effect transistor device structure and method for forming the same Jan 15, 2020 Issued
Array ( [id] => 17137812 [patent_doc_number] => 11139379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Semiconductor structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/744459 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 48 [patent_no_of_words] => 12021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744459 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744459
Semiconductor structure and method for forming the same Jan 15, 2020 Issued
Array ( [id] => 17063142 [patent_doc_number] => 11107752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Half buried nFET/pFET epitaxy source/drain strap [patent_app_type] => utility [patent_app_number] => 16/733427 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5984 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733427 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733427
Half buried nFET/pFET epitaxy source/drain strap Jan 2, 2020 Issued
Array ( [id] => 16959263 [patent_doc_number] => 11063147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Forming bottom source and drain extension on vertical transport FET (VTFET) [patent_app_type] => utility [patent_app_number] => 16/733832 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5006 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733832 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733832
Forming bottom source and drain extension on vertical transport FET (VTFET) Jan 2, 2020 Issued
Array ( [id] => 16774101 [patent_doc_number] => 10985224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Display panel and display device [patent_app_type] => utility [patent_app_number] => 16/729239 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 10067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729239
Display panel and display device Dec 26, 2019 Issued
Array ( [id] => 16182329 [patent_doc_number] => 20200229298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => APPARATUS RELATED TO CONFORMAL COATING IMPLEMENTED WITH SURFACE MOUNT DEVICES [patent_app_type] => utility [patent_app_number] => 16/718205 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718205 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718205
Apparatus related to conformal coating implemented with surface mount devices Dec 17, 2019 Issued
Array ( [id] => 16905102 [patent_doc_number] => 20210184018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => CONTACT AND VIA STRUCTURES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/717600 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717600
Contact and via structures for semiconductor devices Dec 16, 2019 Issued
Array ( [id] => 15808047 [patent_doc_number] => 20200127166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => Methods For Growing Light Emitting Devices Under Ultra-Violet Illumination [patent_app_type] => utility [patent_app_number] => 16/717052 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717052 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/717052
Methods for growing light emitting devices under ultra-violet illumination Dec 16, 2019 Issued
Array ( [id] => 17048098 [patent_doc_number] => 11101288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Three-dimensional memory device containing plural work function word lines and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/710572 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 60 [patent_no_of_words] => 21496 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710572 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710572
Three-dimensional memory device containing plural work function word lines and methods of forming the same Dec 10, 2019 Issued
Array ( [id] => 15776485 [patent_doc_number] => 20200119260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-16 [patent_title] => METHODS OF FORMING ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 16/707958 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707958 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707958
Methods of forming electronic devices Dec 8, 2019 Issued
Array ( [id] => 16180579 [patent_doc_number] => 20200227548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => Semiconductor Device with Integrated Clamp Diode [patent_app_type] => utility [patent_app_number] => 16/704796 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704796
Semiconductor device with integrated clamp diode Dec 4, 2019 Issued
Array ( [id] => 17849606 [patent_doc_number] => 11439007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Nanotwinned structure [patent_app_type] => utility [patent_app_number] => 16/705138 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4041 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705138
Nanotwinned structure Dec 4, 2019 Issued
Array ( [id] => 16873511 [patent_doc_number] => 20210166978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/699496 [patent_app_country] => US [patent_app_date] => 2019-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699496 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/699496
Semiconductor device and method for manufacturing the same Nov 28, 2019 Issued
Array ( [id] => 17493616 [patent_doc_number] => 11282934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Structure for metal gate electrode and method of fabrication [patent_app_type] => utility [patent_app_number] => 16/692571 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 7364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692571
Structure for metal gate electrode and method of fabrication Nov 21, 2019 Issued
Array ( [id] => 17063369 [patent_doc_number] => 11107984 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Protuberant contacts for resistive switching devices [patent_app_type] => utility [patent_app_number] => 16/688500 [patent_app_country] => US [patent_app_date] => 2019-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7244 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16688500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/688500
Protuberant contacts for resistive switching devices Nov 18, 2019 Issued
Array ( [id] => 17381215 [patent_doc_number] => 11239248 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Microelectronic devices including stair step structures, and related electronic devices and methods [patent_app_type] => utility [patent_app_number] => 16/686830 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 10833 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686830 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/686830
Microelectronic devices including stair step structures, and related electronic devices and methods Nov 17, 2019 Issued
Array ( [id] => 17077924 [patent_doc_number] => 11114339 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Method for reducing metal plug corrosion and device [patent_app_type] => utility [patent_app_number] => 16/686682 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 7602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16686682 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/686682
Method for reducing metal plug corrosion and device Nov 17, 2019 Issued
Array ( [id] => 17093020 [patent_doc_number] => 11121218 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Gate-all-around transistor structure [patent_app_type] => utility [patent_app_number] => 16/683894 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4551 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683894
Gate-all-around transistor structure Nov 13, 2019 Issued
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