Search

Renee R. Berry

Examiner (ID: 18563)

Most Active Art Unit
2818
Art Unit(s)
2829, 1762, 2891, 1109, 1104, 2813, 1792, 2818
Total Applications
592
Issued Applications
546
Pending Applications
22
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 481833 [patent_doc_number] => 07220463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'Method for obtaining nanoparticles' [patent_app_type] => utility [patent_app_number] => 11/366885 [patent_app_country] => US [patent_app_date] => 2006-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5077 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/220/07220463.pdf [firstpage_image] =>[orig_patent_app_number] => 11366885 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/366885
Method for obtaining nanoparticles Mar 1, 2006 Issued
Array ( [id] => 1021576 [patent_doc_number] => 06887800 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-03 [patent_title] => 'Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction' [patent_app_type] => utility [patent_app_number] => 10/862169 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3257 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/887/06887800.pdf [firstpage_image] =>[orig_patent_app_number] => 10862169 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/862169
Method for making a semiconductor device with a high-k gate dielectric and metal layers that meet at a P/N junction Jun 3, 2004 Issued
Array ( [id] => 720028 [patent_doc_number] => 07049247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-23 [patent_title] => 'Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made' [patent_app_type] => utility [patent_app_number] => 10/838849 [patent_app_country] => US [patent_app_date] => 2004-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8808 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/049/07049247.pdf [firstpage_image] =>[orig_patent_app_number] => 10838849 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/838849
Method for fabricating an ultralow dielectric constant material as an intralevel or interlevel dielectric in a semiconductor device and electronic device made May 2, 2004 Issued
Array ( [id] => 773537 [patent_doc_number] => 07001844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-21 [patent_title] => 'Material for contact etch layer to enhance device performance' [patent_app_type] => utility [patent_app_number] => 10/835949 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4698 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/001/07001844.pdf [firstpage_image] =>[orig_patent_app_number] => 10835949 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835949
Material for contact etch layer to enhance device performance Apr 29, 2004 Issued
Array ( [id] => 7462294 [patent_doc_number] => 20040197974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Silicon fixture supporting silicon wafers during high temperature processing' [patent_app_type] => new [patent_app_number] => 10/829641 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20040197974.pdf [firstpage_image] =>[orig_patent_app_number] => 10829641 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/829641
Silicon fixture supporting silicon wafers during high temperature processing Apr 21, 2004 Issued
Array ( [id] => 7460861 [patent_doc_number] => 20040165870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Delivery of solid chemical precursors' [patent_app_type] => new [patent_app_number] => 10/787692 [patent_app_country] => US [patent_app_date] => 2004-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5325 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20040165870.pdf [firstpage_image] =>[orig_patent_app_number] => 10787692 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/787692
Delivery of solid chemical precursors Feb 25, 2004 Abandoned
Array ( [id] => 728514 [patent_doc_number] => 07041607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Method for fabricating crystalline-dielectric thin films and devices formed using same' [patent_app_type] => utility [patent_app_number] => 10/784593 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 24 [patent_no_of_words] => 4141 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/041/07041607.pdf [firstpage_image] =>[orig_patent_app_number] => 10784593 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/784593
Method for fabricating crystalline-dielectric thin films and devices formed using same Feb 22, 2004 Issued
Array ( [id] => 7462594 [patent_doc_number] => 20040198029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Process for producing thin oxide film and production apparatus' [patent_app_type] => new [patent_app_number] => 10/485823 [patent_app_country] => US [patent_app_date] => 2004-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5439 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20040198029.pdf [firstpage_image] =>[orig_patent_app_number] => 10485823 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/485823
Process for producing thin oxide film and production apparatus Feb 17, 2004 Abandoned
Array ( [id] => 715637 [patent_doc_number] => 07053005 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Method of forming a silicon oxide layer in a semiconductor manufacturing process' [patent_app_type] => utility [patent_app_number] => 10/779733 [patent_app_country] => US [patent_app_date] => 2004-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7569 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053005.pdf [firstpage_image] =>[orig_patent_app_number] => 10779733 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/779733
Method of forming a silicon oxide layer in a semiconductor manufacturing process Feb 17, 2004 Issued
Array ( [id] => 785246 [patent_doc_number] => 06989328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Method of manufacturing semiconductor device having damascene interconnection' [patent_app_type] => utility [patent_app_number] => 10/777198 [patent_app_country] => US [patent_app_date] => 2004-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 5176 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/989/06989328.pdf [firstpage_image] =>[orig_patent_app_number] => 10777198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/777198
Method of manufacturing semiconductor device having damascene interconnection Feb 12, 2004 Issued
Array ( [id] => 1034485 [patent_doc_number] => 06875694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-05 [patent_title] => 'Method of treating inlaid copper for improved capping layer adhesion without damaging porous low-k materials' [patent_app_type] => utility [patent_app_number] => 10/774418 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875694.pdf [firstpage_image] =>[orig_patent_app_number] => 10774418 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/774418
Method of treating inlaid copper for improved capping layer adhesion without damaging porous low-k materials Feb 9, 2004 Issued
Array ( [id] => 972165 [patent_doc_number] => 06936550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Semiconductor integrated circuit device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/760358 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 47 [patent_no_of_words] => 20735 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/936/06936550.pdf [firstpage_image] =>[orig_patent_app_number] => 10760358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/760358
Semiconductor integrated circuit device and method for manufacturing the same Jan 20, 2004 Issued
Array ( [id] => 7309210 [patent_doc_number] => 20040142516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Thin film transistor having copper alloy wire and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/756378 [patent_app_country] => US [patent_app_date] => 2004-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4523 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20040142516.pdf [firstpage_image] =>[orig_patent_app_number] => 10756378 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/756378
Thin film transistor having copper alloy wire and method of manufacturing the same Jan 13, 2004 Issued
Array ( [id] => 7429367 [patent_doc_number] => 20040161914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Manufacturing of a low-noise mos device' [patent_app_type] => new [patent_app_number] => 10/756728 [patent_app_country] => US [patent_app_date] => 2004-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3572 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20040161914.pdf [firstpage_image] =>[orig_patent_app_number] => 10756728 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/756728
Manufacturing of a low-noise mos device Jan 12, 2004 Issued
Array ( [id] => 7467689 [patent_doc_number] => 20040198898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Method for vapor deposition of hydrophobic films on surfaces' [patent_app_type] => new [patent_app_number] => 10/746676 [patent_app_country] => US [patent_app_date] => 2003-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3727 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20040198898.pdf [firstpage_image] =>[orig_patent_app_number] => 10746676 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/746676
Method for vapor deposition of hydrophobic films on surfaces Dec 23, 2003 Abandoned
Array ( [id] => 979053 [patent_doc_number] => 06930057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Columnar structured material and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 10/744390 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 7657 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930057.pdf [firstpage_image] =>[orig_patent_app_number] => 10744390 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/744390
Columnar structured material and manufacturing method therefor Dec 22, 2003 Issued
Array ( [id] => 1009337 [patent_doc_number] => 06900099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-31 [patent_title] => 'Flash memory cell and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/740305 [patent_app_country] => US [patent_app_date] => 2003-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 1815 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/900/06900099.pdf [firstpage_image] =>[orig_patent_app_number] => 10740305 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/740305
Flash memory cell and method for fabricating the same Dec 17, 2003 Issued
Array ( [id] => 972164 [patent_doc_number] => 06936549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Chemical vapor deposition using organometallic precursors' [patent_app_type] => utility [patent_app_number] => 10/737500 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4291 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/936/06936549.pdf [firstpage_image] =>[orig_patent_app_number] => 10737500 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/737500
Chemical vapor deposition using organometallic precursors Dec 15, 2003 Issued
Array ( [id] => 7138631 [patent_doc_number] => 20050115504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Method and apparatus for forming thin films, method for manufacturing solar cell, and solar cell' [patent_app_type] => utility [patent_app_number] => 10/725905 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6295 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20050115504.pdf [firstpage_image] =>[orig_patent_app_number] => 10725905 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/725905
Method and apparatus for forming thin films, method for manufacturing solar cell, and solar cell Nov 30, 2003 Abandoned
Array ( [id] => 779570 [patent_doc_number] => 06995438 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-02-07 [patent_title] => 'Semiconductor device with fully silicided source/drain and damascence metal gate' [patent_app_type] => utility [patent_app_number] => 10/674478 [patent_app_country] => US [patent_app_date] => 2003-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 4320 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/995/06995438.pdf [firstpage_image] =>[orig_patent_app_number] => 10674478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/674478
Semiconductor device with fully silicided source/drain and damascence metal gate Sep 30, 2003 Issued
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