Search

Renee R. Berry

Examiner (ID: 18563)

Most Active Art Unit
2818
Art Unit(s)
2829, 1762, 2891, 1109, 1104, 2813, 1792, 2818
Total Applications
592
Issued Applications
546
Pending Applications
22
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1050028 [patent_doc_number] => 06861305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Methods for fabricating group III nitride compound semiconductors and group III nitride compound semiconductor devices' [patent_app_type] => utility [patent_app_number] => 10/240249 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 48 [patent_no_of_words] => 15985 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/861/06861305.pdf [firstpage_image] =>[orig_patent_app_number] => 10240249 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/240249
Methods for fabricating group III nitride compound semiconductors and group III nitride compound semiconductor devices Mar 28, 2001 Issued
Array ( [id] => 1409700 [patent_doc_number] => 06528395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-04 [patent_title] => 'Method of fabricating compound semiconductor device and apparatus for fabricating compound semiconductor device' [patent_app_type] => B2 [patent_app_number] => 09/818309 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6492 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528395.pdf [firstpage_image] =>[orig_patent_app_number] => 09818309 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/818309
Method of fabricating compound semiconductor device and apparatus for fabricating compound semiconductor device Mar 26, 2001 Issued
Array ( [id] => 970032 [patent_doc_number] => 06935158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'MIS hydrogen sensors' [patent_app_type] => utility [patent_app_number] => 10/472988 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 5580 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/935/06935158.pdf [firstpage_image] =>[orig_patent_app_number] => 10472988 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/472988
MIS hydrogen sensors Mar 15, 2001 Issued
Array ( [id] => 6896209 [patent_doc_number] => 20010026999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'DC or AC electric field asssisted anneal' [patent_app_type] => new [patent_app_number] => 09/809887 [patent_app_country] => US [patent_app_date] => 2001-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9979 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026999.pdf [firstpage_image] =>[orig_patent_app_number] => 09809887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/809887
DC or AC electric field assisted anneal Mar 15, 2001 Issued
Array ( [id] => 7335586 [patent_doc_number] => 20040132286 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2004-07-08 [patent_title] => 'METHODS OF FORMING REFRACTORY METAL SILICIDE COMPONENTS AND METHODS OF RESTRICTING SILICON SURFACE MIGRATION OF A SILICON STRUCTURE' [patent_app_type] => corrected [patent_app_number] => 09/798404 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2271 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0132/20040132286.pdf [firstpage_image] =>[orig_patent_app_number] => 09798404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798404
Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure Mar 1, 2001 Issued
Array ( [id] => 1424061 [patent_doc_number] => 06503782 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-07 [patent_title] => 'Complementary accumulation-mode JFET integrated circuit topology using wide (>2eV) bandgap semiconductors' [patent_app_type] => B2 [patent_app_number] => 09/796490 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503782.pdf [firstpage_image] =>[orig_patent_app_number] => 09796490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796490
Complementary accumulation-mode JFET integrated circuit topology using wide (>2eV) bandgap semiconductors Mar 1, 2001 Issued
Array ( [id] => 7335586 [patent_doc_number] => 20040132286 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2004-07-08 [patent_title] => 'METHODS OF FORMING REFRACTORY METAL SILICIDE COMPONENTS AND METHODS OF RESTRICTING SILICON SURFACE MIGRATION OF A SILICON STRUCTURE' [patent_app_type] => corrected [patent_app_number] => 09/798404 [patent_app_country] => US [patent_app_date] => 2001-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2271 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A9/0132/20040132286.pdf [firstpage_image] =>[orig_patent_app_number] => 09798404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/798404
Methods of forming refractory metal silicide components and methods of restricting silicon surface migration of a silicon structure Mar 1, 2001 Issued
Array ( [id] => 6892080 [patent_doc_number] => 20010018242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-30 [patent_title] => 'Method for regenerating semiconductor wafers' [patent_app_type] => new [patent_app_number] => 09/796209 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1236 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20010018242.pdf [firstpage_image] =>[orig_patent_app_number] => 09796209 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796209
Method for regenerating semiconductor wafers Feb 27, 2001 Issued
Array ( [id] => 5922095 [patent_doc_number] => 20020115291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Method of fabricating node contacts' [patent_app_type] => new [patent_app_number] => 09/789358 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2080 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20020115291.pdf [firstpage_image] =>[orig_patent_app_number] => 09789358 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789358
Method of fabricating node contacts Feb 19, 2001 Issued
Array ( [id] => 1411100 [patent_doc_number] => 06514347 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-04 [patent_title] => 'Apparatus and method for plasma treatment' [patent_app_type] => B2 [patent_app_number] => 09/782519 [patent_app_country] => US [patent_app_date] => 2001-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/514/06514347.pdf [firstpage_image] =>[orig_patent_app_number] => 09782519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782519
Apparatus and method for plasma treatment Feb 13, 2001 Issued
Array ( [id] => 6595411 [patent_doc_number] => 20020042195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'Electrostatic discharge-protection semiconductor device' [patent_app_type] => new [patent_app_number] => 09/782719 [patent_app_country] => US [patent_app_date] => 2001-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20020042195.pdf [firstpage_image] =>[orig_patent_app_number] => 09782719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782719
Electrostatic discharge-protection semiconductor device Feb 12, 2001 Issued
Array ( [id] => 1600440 [patent_doc_number] => 06475890 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-05 [patent_title] => 'Fabrication of a field effect transistor with an upside down T-shaped semiconductor pillar in SOI technology' [patent_app_type] => B1 [patent_app_number] => 09/789939 [patent_app_country] => US [patent_app_date] => 2001-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 3840 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/475/06475890.pdf [firstpage_image] =>[orig_patent_app_number] => 09789939 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/789939
Fabrication of a field effect transistor with an upside down T-shaped semiconductor pillar in SOI technology Feb 11, 2001 Issued
Array ( [id] => 1545422 [patent_doc_number] => 06444582 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Methods for removing silicon-oxy-nitride layer and wafer surface cleaning' [patent_app_type] => B1 [patent_app_number] => 09/776738 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2077 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/444/06444582.pdf [firstpage_image] =>[orig_patent_app_number] => 09776738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/776738
Methods for removing silicon-oxy-nitride layer and wafer surface cleaning Feb 4, 2001 Issued
Array ( [id] => 1346209 [patent_doc_number] => 06583018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Method of ion implantation' [patent_app_type] => B1 [patent_app_number] => 09/719089 [patent_app_country] => US [patent_app_date] => 2001-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3207 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583018.pdf [firstpage_image] =>[orig_patent_app_number] => 09719089 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/719089
Method of ion implantation Feb 4, 2001 Issued
Array ( [id] => 1399112 [patent_doc_number] => 06537892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Glass frit wafer bonding process and packages formed thereby' [patent_app_type] => B2 [patent_app_number] => 09/773959 [patent_app_country] => US [patent_app_date] => 2001-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4458 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/537/06537892.pdf [firstpage_image] =>[orig_patent_app_number] => 09773959 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/773959
Glass frit wafer bonding process and packages formed thereby Feb 1, 2001 Issued
Array ( [id] => 1503743 [patent_doc_number] => 06465367 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Lossless co-planar wave guide in CMOS process' [patent_app_type] => B1 [patent_app_number] => 09/771188 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3214 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465367.pdf [firstpage_image] =>[orig_patent_app_number] => 09771188 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/771188
Lossless co-planar wave guide in CMOS process Jan 28, 2001 Issued
Array ( [id] => 1168845 [patent_doc_number] => 06753249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Multilayer interface in copper CMP for low K dielectric' [patent_app_type] => B1 [patent_app_number] => 09/759908 [patent_app_country] => US [patent_app_date] => 2001-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3119 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/753/06753249.pdf [firstpage_image] =>[orig_patent_app_number] => 09759908 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/759908
Multilayer interface in copper CMP for low K dielectric Jan 15, 2001 Issued
Array ( [id] => 1453381 [patent_doc_number] => 06461879 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Method and apparatus for measuring effects of packaging stresses of common IC electrical performance parameters at wafer sort' [patent_app_type] => B1 [patent_app_number] => 09/757118 [patent_app_country] => US [patent_app_date] => 2001-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2785 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/461/06461879.pdf [firstpage_image] =>[orig_patent_app_number] => 09757118 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/757118
Method and apparatus for measuring effects of packaging stresses of common IC electrical performance parameters at wafer sort Jan 8, 2001 Issued
Array ( [id] => 6209285 [patent_doc_number] => 20020072190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Method of fabricating a cylinder capacitor having a reverse electrode structure' [patent_app_type] => new [patent_app_number] => 09/745278 [patent_app_country] => US [patent_app_date] => 2000-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20020072190.pdf [firstpage_image] =>[orig_patent_app_number] => 09745278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745278
Method of fabricating a cylinder capacitor having a reverse electrode structure Dec 19, 2000 Abandoned
Array ( [id] => 7645658 [patent_doc_number] => 06472311 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/719688 [patent_app_country] => US [patent_app_date] => 2000-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 3023 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472311.pdf [firstpage_image] =>[orig_patent_app_number] => 09719688 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/719688
Method for manufacturing semiconductor device Dec 14, 2000 Issued
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