
Renee R. Berry
Examiner (ID: 18563)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2829, 1762, 2891, 1109, 1104, 2813, 1792, 2818 |
| Total Applications | 592 |
| Issued Applications | 546 |
| Pending Applications | 22 |
| Abandoned Applications | 24 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4367200
[patent_doc_number] => 06274517
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-14
[patent_title] => 'Method of fabricating an improved spacer'
[patent_app_type] => 1
[patent_app_number] => 9/223196
[patent_app_country] => US
[patent_app_date] => 1998-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 2734
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/274/06274517.pdf
[firstpage_image] =>[orig_patent_app_number] => 223196
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/223196 | Method of fabricating an improved spacer | Dec 29, 1998 | Issued |
Array
(
[id] => 4102418
[patent_doc_number] => 06100195
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-08
[patent_title] => 'Passivation of copper interconnect surfaces with a passivating metal layer'
[patent_app_type] => 1
[patent_app_number] => 9/222275
[patent_app_country] => US
[patent_app_date] => 1998-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 4331
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/100/06100195.pdf
[firstpage_image] =>[orig_patent_app_number] => 222275
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/222275 | Passivation of copper interconnect surfaces with a passivating metal layer | Dec 27, 1998 | Issued |
Array
(
[id] => 4172820
[patent_doc_number] => 06083818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Electronic devices with strontium barrier film and process for making same'
[patent_app_type] => 1
[patent_app_number] => 9/215127
[patent_app_country] => US
[patent_app_date] => 1998-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 8245
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/083/06083818.pdf
[firstpage_image] =>[orig_patent_app_number] => 215127
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/215127 | Electronic devices with strontium barrier film and process for making same | Dec 17, 1998 | Issued |
Array
(
[id] => 4401818
[patent_doc_number] => 06299693
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-09
[patent_title] => 'Method and apparatus for aligning a wafer chuck in a semiconductor wafer processing procedure'
[patent_app_type] => 1
[patent_app_number] => 9/213751
[patent_app_country] => US
[patent_app_date] => 1998-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2569
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/299/06299693.pdf
[firstpage_image] =>[orig_patent_app_number] => 213751
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/213751 | Method and apparatus for aligning a wafer chuck in a semiconductor wafer processing procedure | Dec 16, 1998 | Issued |
Array
(
[id] => 4344712
[patent_doc_number] => 06284647
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-09-04
[patent_title] => 'Method to improve the uniformity of chemical mechanical polishing'
[patent_app_type] => 1
[patent_app_number] => 9/216022
[patent_app_country] => US
[patent_app_date] => 1998-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 1391
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/284/06284647.pdf
[firstpage_image] =>[orig_patent_app_number] => 216022
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/216022 | Method to improve the uniformity of chemical mechanical polishing | Dec 15, 1998 | Issued |
Array
(
[id] => 4378822
[patent_doc_number] => 06303520
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-16
[patent_title] => 'Silicon oxynitride film'
[patent_app_type] => 1
[patent_app_number] => 9/212495
[patent_app_country] => US
[patent_app_date] => 1998-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2717
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/303/06303520.pdf
[firstpage_image] =>[orig_patent_app_number] => 212495
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/212495 | Silicon oxynitride film | Dec 14, 1998 | Issued |
Array
(
[id] => 4417687
[patent_doc_number] => 06194328
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'H2 diffusion barrier formation by nitrogen incorporation in oxide layer'
[patent_app_type] => 1
[patent_app_number] => 9/207676
[patent_app_country] => US
[patent_app_date] => 1998-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2367
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/194/06194328.pdf
[firstpage_image] =>[orig_patent_app_number] => 207676
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/207676 | H2 diffusion barrier formation by nitrogen incorporation in oxide layer | Dec 8, 1998 | Issued |
Array
(
[id] => 1495142
[patent_doc_number] => 06403498
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-11
[patent_title] => 'Method and device for treating substrate'
[patent_app_type] => B1
[patent_app_number] => 09/194539
[patent_app_country] => US
[patent_app_date] => 1998-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 32
[patent_no_of_words] => 14309
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/403/06403498.pdf
[firstpage_image] =>[orig_patent_app_number] => 09194539
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/194539 | Method and device for treating substrate | Nov 29, 1998 | Issued |
Array
(
[id] => 4357534
[patent_doc_number] => 06174805
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-16
[patent_title] => 'Titanium film forming method'
[patent_app_type] => 1
[patent_app_number] => 9/198005
[patent_app_country] => US
[patent_app_date] => 1998-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 19
[patent_no_of_words] => 6480
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/174/06174805.pdf
[firstpage_image] =>[orig_patent_app_number] => 198005
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/198005 | Titanium film forming method | Nov 22, 1998 | Issued |
Array
(
[id] => 4246649
[patent_doc_number] => 06136705
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Self-aligned dual thickness cobalt silicide layer formation process'
[patent_app_type] => 1
[patent_app_number] => 9/176785
[patent_app_country] => US
[patent_app_date] => 1998-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 3832
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/136/06136705.pdf
[firstpage_image] =>[orig_patent_app_number] => 176785
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/176785 | Self-aligned dual thickness cobalt silicide layer formation process | Oct 21, 1998 | Issued |
Array
(
[id] => 4087648
[patent_doc_number] => 06133145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-17
[patent_title] => 'Method to increase the etch rate selectivity between metal and photoresist via use of a plasma treatment'
[patent_app_type] => 1
[patent_app_number] => 9/169434
[patent_app_country] => US
[patent_app_date] => 1998-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 2377
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/133/06133145.pdf
[firstpage_image] =>[orig_patent_app_number] => 169434
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/169434 | Method to increase the etch rate selectivity between metal and photoresist via use of a plasma treatment | Oct 8, 1998 | Issued |
Array
(
[id] => 4303188
[patent_doc_number] => 06187680
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Method/structure for creating aluminum wirebound pad on copper BEOL'
[patent_app_type] => 1
[patent_app_number] => 9/167834
[patent_app_country] => US
[patent_app_date] => 1998-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 3493
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/187/06187680.pdf
[firstpage_image] =>[orig_patent_app_number] => 167834
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/167834 | Method/structure for creating aluminum wirebound pad on copper BEOL | Oct 6, 1998 | Issued |
Array
(
[id] => 4156642
[patent_doc_number] => 06156673
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-05
[patent_title] => 'Process for producing a ceramic layer'
[patent_app_type] => 1
[patent_app_number] => 9/164115
[patent_app_country] => US
[patent_app_date] => 1998-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3228
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/156/06156673.pdf
[firstpage_image] =>[orig_patent_app_number] => 164115
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/164115 | Process for producing a ceramic layer | Sep 29, 1998 | Issued |
Array
(
[id] => 4290540
[patent_doc_number] => 06235648
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-05-22
[patent_title] => 'Semiconductor device including insulation film and fabrication method thereof'
[patent_app_type] => 1
[patent_app_number] => 9/160044
[patent_app_country] => US
[patent_app_date] => 1998-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 34
[patent_no_of_words] => 9206
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/235/06235648.pdf
[firstpage_image] =>[orig_patent_app_number] => 160044
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/160044 | Semiconductor device including insulation film and fabrication method thereof | Sep 24, 1998 | Issued |
Array
(
[id] => 1553610
[patent_doc_number] => 06348413
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-19
[patent_title] => 'High pressure N2 RTA process for TiS2 formation'
[patent_app_type] => B1
[patent_app_number] => 09/157855
[patent_app_country] => US
[patent_app_date] => 1998-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4953
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/348/06348413.pdf
[firstpage_image] =>[orig_patent_app_number] => 09157855
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/157855 | High pressure N2 RTA process for TiS2 formation | Sep 20, 1998 | Issued |
Array
(
[id] => 1474652
[patent_doc_number] => 06387803
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-05-14
[patent_title] => 'Method for forming a silicide region on a silicon body'
[patent_app_type] => B2
[patent_app_number] => 09/158346
[patent_app_country] => US
[patent_app_date] => 1998-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 6095
[patent_no_of_claims] => 42
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/387/06387803.pdf
[firstpage_image] =>[orig_patent_app_number] => 09158346
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/158346 | Method for forming a silicide region on a silicon body | Sep 20, 1998 | Issued |
Array
(
[id] => 4395191
[patent_doc_number] => 06297135
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-02
[patent_title] => 'Method for forming silicide regions on an integrated device'
[patent_app_type] => 1
[patent_app_number] => 9/158265
[patent_app_country] => US
[patent_app_date] => 1998-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 6157
[patent_no_of_claims] => 50
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/297/06297135.pdf
[firstpage_image] =>[orig_patent_app_number] => 158265
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/158265 | Method for forming silicide regions on an integrated device | Sep 20, 1998 | Issued |
Array
(
[id] => 4257970
[patent_doc_number] => 06204103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Process to make complementary silicide metal gates for CMOS technology'
[patent_app_type] => 1
[patent_app_number] => 9/157114
[patent_app_country] => US
[patent_app_date] => 1998-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 3608
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/204/06204103.pdf
[firstpage_image] =>[orig_patent_app_number] => 157114
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/157114 | Process to make complementary silicide metal gates for CMOS technology | Sep 17, 1998 | Issued |
Array
(
[id] => 4292648
[patent_doc_number] => 06180506
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Upper redundant layer for damascene metallization'
[patent_app_type] => 1
[patent_app_number] => 9/152836
[patent_app_country] => US
[patent_app_date] => 1998-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 5199
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180506.pdf
[firstpage_image] =>[orig_patent_app_number] => 152836
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/152836 | Upper redundant layer for damascene metallization | Sep 13, 1998 | Issued |
Array
(
[id] => 4188908
[patent_doc_number] => 06153516
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-28
[patent_title] => 'Method of fabricating a modified polysilicon plug structure'
[patent_app_type] => 1
[patent_app_number] => 9/151155
[patent_app_country] => US
[patent_app_date] => 1998-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 2779
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 351
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/153/06153516.pdf
[firstpage_image] =>[orig_patent_app_number] => 151155
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/151155 | Method of fabricating a modified polysilicon plug structure | Sep 9, 1998 | Issued |