Search

Renee R. Berry

Examiner (ID: 18563)

Most Active Art Unit
2818
Art Unit(s)
2829, 1762, 2891, 1109, 1104, 2813, 1792, 2818
Total Applications
592
Issued Applications
546
Pending Applications
22
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
08/674782 METHOD FOR CLEANING SEMICONDUCTOR WAFERS AND EQUIPMENT Jul 2, 1996 Abandoned
Array ( [id] => 3861082 [patent_doc_number] => 05795828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Electroless plating bath used for forming a wiring of a semiconductor device, and method of forming a wiring of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/675667 [patent_app_country] => US [patent_app_date] => 1996-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 21 [patent_no_of_words] => 7864 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/795/05795828.pdf [firstpage_image] =>[orig_patent_app_number] => 675667 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675667
Electroless plating bath used for forming a wiring of a semiconductor device, and method of forming a wiring of a semiconductor device Jul 2, 1996 Issued
Array ( [id] => 3782371 [patent_doc_number] => 05821173 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Semiconductor element and a method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/674186 [patent_app_country] => US [patent_app_date] => 1996-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 13201 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821173.pdf [firstpage_image] =>[orig_patent_app_number] => 674186 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/674186
Semiconductor element and a method of manufacturing the same Jun 30, 1996 Issued
Array ( [id] => 3829426 [patent_doc_number] => 05765680 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Porous silicon with embedded tritium as a stand-alone prime power source for optoelectronic applications' [patent_app_type] => 1 [patent_app_number] => 8/671504 [patent_app_country] => US [patent_app_date] => 1996-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3856 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/765/05765680.pdf [firstpage_image] =>[orig_patent_app_number] => 671504 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/671504
Porous silicon with embedded tritium as a stand-alone prime power source for optoelectronic applications Jun 26, 1996 Issued
Array ( [id] => 3691028 [patent_doc_number] => 05604162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Process of preparing tritiated porous silicon' [patent_app_type] => 1 [patent_app_number] => 8/671325 [patent_app_country] => US [patent_app_date] => 1996-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3857 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604162.pdf [firstpage_image] =>[orig_patent_app_number] => 671325 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/671325
Process of preparing tritiated porous silicon Jun 26, 1996 Issued
Array ( [id] => 4034960 [patent_doc_number] => 05856242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Method of producing dielectric thin film element' [patent_app_type] => 1 [patent_app_number] => 8/672233 [patent_app_country] => US [patent_app_date] => 1996-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856242.pdf [firstpage_image] =>[orig_patent_app_number] => 672233 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672233
Method of producing dielectric thin film element Jun 26, 1996 Issued
Array ( [id] => 3867911 [patent_doc_number] => 05837606 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Semiconductor device having internal wire and method of fabricating the same' [patent_app_type] => 1 [patent_app_number] => 8/668012 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 65 [patent_no_of_words] => 6433 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/837/05837606.pdf [firstpage_image] =>[orig_patent_app_number] => 668012 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/668012
Semiconductor device having internal wire and method of fabricating the same Jun 16, 1996 Issued
Array ( [id] => 4034855 [patent_doc_number] => 05856236 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Method of depositing a smooth conformal aluminum film on a refractory metal nitride layer' [patent_app_type] => 1 [patent_app_number] => 8/663996 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2996 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856236.pdf [firstpage_image] =>[orig_patent_app_number] => 663996 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/663996
Method of depositing a smooth conformal aluminum film on a refractory metal nitride layer Jun 13, 1996 Issued
Array ( [id] => 3945591 [patent_doc_number] => 05953626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Dissolvable dielectric method' [patent_app_type] => 1 [patent_app_number] => 8/659166 [patent_app_country] => US [patent_app_date] => 1996-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 5136 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953626.pdf [firstpage_image] =>[orig_patent_app_number] => 659166 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/659166
Dissolvable dielectric method Jun 4, 1996 Issued
Array ( [id] => 3932558 [patent_doc_number] => 05939333 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Silicon nitride deposition method' [patent_app_type] => 1 [patent_app_number] => 8/655728 [patent_app_country] => US [patent_app_date] => 1996-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6628 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/939/05939333.pdf [firstpage_image] =>[orig_patent_app_number] => 655728 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/655728
Silicon nitride deposition method May 29, 1996 Issued
Array ( [id] => 4130768 [patent_doc_number] => 06121066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Method for fabricating a field emission display' [patent_app_type] => 1 [patent_app_number] => 8/648844 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 18 [patent_no_of_words] => 1957 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121066.pdf [firstpage_image] =>[orig_patent_app_number] => 648844 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/648844
Method for fabricating a field emission display May 14, 1996 Issued
Array ( [id] => 4207050 [patent_doc_number] => 06028002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-22 [patent_title] => 'Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients' [patent_app_type] => 1 [patent_app_number] => 8/649902 [patent_app_country] => US [patent_app_date] => 1996-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1915 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/028/06028002.pdf [firstpage_image] =>[orig_patent_app_number] => 649902 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/649902
Refractory metal roughness reduction using high temperature anneal in hydrides or organo-silane ambients May 14, 1996 Issued
Array ( [id] => 3950509 [patent_doc_number] => 05899724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Method for fabricating a titanium resistor' [patent_app_type] => 1 [patent_app_number] => 8/647392 [patent_app_country] => US [patent_app_date] => 1996-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2725 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/899/05899724.pdf [firstpage_image] =>[orig_patent_app_number] => 647392 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/647392
Method for fabricating a titanium resistor May 8, 1996 Issued
Array ( [id] => 4156438 [patent_doc_number] => 06156657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Method of treating active material' [patent_app_type] => 1 [patent_app_number] => 8/637410 [patent_app_country] => US [patent_app_date] => 1996-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 41 [patent_no_of_words] => 14294 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/156/06156657.pdf [firstpage_image] =>[orig_patent_app_number] => 637410 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/637410
Method of treating active material Apr 24, 1996 Issued
Array ( [id] => 3813873 [patent_doc_number] => 05789320 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Plating of noble metal electrodes for DRAM and FRAM' [patent_app_type] => 1 [patent_app_number] => 8/636456 [patent_app_country] => US [patent_app_date] => 1996-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 51 [patent_no_of_words] => 5292 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/789/05789320.pdf [firstpage_image] =>[orig_patent_app_number] => 636456 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/636456
Plating of noble metal electrodes for DRAM and FRAM Apr 22, 1996 Issued
Array ( [id] => 3958055 [patent_doc_number] => 05930675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Process of forming inter-level connection without increase of contact resistance' [patent_app_type] => 1 [patent_app_number] => 8/632908 [patent_app_country] => US [patent_app_date] => 1996-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 3060 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930675.pdf [firstpage_image] =>[orig_patent_app_number] => 632908 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632908
Process of forming inter-level connection without increase of contact resistance Apr 15, 1996 Issued
Array ( [id] => 3791833 [patent_doc_number] => 05780358 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-14 [patent_title] => 'Method for chemical-mechanical polish (CMP) planarizing of cooper containing conductor layers' [patent_app_type] => 1 [patent_app_number] => 8/630112 [patent_app_country] => US [patent_app_date] => 1996-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4967 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/780/05780358.pdf [firstpage_image] =>[orig_patent_app_number] => 630112 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/630112
Method for chemical-mechanical polish (CMP) planarizing of cooper containing conductor layers Apr 7, 1996 Issued
Array ( [id] => 3994275 [patent_doc_number] => 05985757 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/628477 [patent_app_country] => US [patent_app_date] => 1996-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2691 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/985/05985757.pdf [firstpage_image] =>[orig_patent_app_number] => 628477 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/628477
Method for fabricating semiconductor device Apr 4, 1996 Issued
Array ( [id] => 4063088 [patent_doc_number] => 05866477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Method of polishing a chamfered portion of a semiconductor silicon substrate' [patent_app_type] => 1 [patent_app_number] => 8/627012 [patent_app_country] => US [patent_app_date] => 1996-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2763 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866477.pdf [firstpage_image] =>[orig_patent_app_number] => 627012 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627012
Method of polishing a chamfered portion of a semiconductor silicon substrate Apr 2, 1996 Issued
Array ( [id] => 4057426 [patent_doc_number] => 05895260 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-20 [patent_title] => 'Method of fabricating semiconductor devices and the devices' [patent_app_type] => 1 [patent_app_number] => 8/625606 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2735 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/895/05895260.pdf [firstpage_image] =>[orig_patent_app_number] => 625606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/625606
Method of fabricating semiconductor devices and the devices Mar 28, 1996 Issued
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