
Renee R. Berry
Examiner (ID: 8148)
| Most Active Art Unit | 2818 |
| Art Unit(s) | 2829, 1109, 1762, 1104, 2813, 2891, 1792, 2818 |
| Total Applications | 592 |
| Issued Applications | 546 |
| Pending Applications | 22 |
| Abandoned Applications | 24 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4205302
[patent_doc_number] => 06077781
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Single step process for blanket-selective CVD aluminum deposition'
[patent_app_type] => 1
[patent_app_number] => 8/620405
[patent_app_country] => US
[patent_app_date] => 1996-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 4179
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 61
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/077/06077781.pdf
[firstpage_image] =>[orig_patent_app_number] => 620405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/620405 | Single step process for blanket-selective CVD aluminum deposition | Mar 21, 1996 | Issued |
Array
(
[id] => 3877019
[patent_doc_number] => 05728619
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Selective reactive Ion etch (RIE) method for forming a narrow line-width high aspect ratio via through an integrated circuit layer'
[patent_app_type] => 1
[patent_app_number] => 8/618890
[patent_app_country] => US
[patent_app_date] => 1996-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 8490
[patent_no_of_claims] => 17
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[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/728/05728619.pdf
[firstpage_image] =>[orig_patent_app_number] => 618890
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/618890 | Selective reactive Ion etch (RIE) method for forming a narrow line-width high aspect ratio via through an integrated circuit layer | Mar 19, 1996 | Issued |
Array
(
[id] => 4057541
[patent_doc_number] => 05895268
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-04-20
[patent_title] => 'High pressure nitridation of tungsten'
[patent_app_type] => 1
[patent_app_number] => 8/617208
[patent_app_country] => US
[patent_app_date] => 1996-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 2555
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[pdf_file] => patents/05/895/05895268.pdf
[firstpage_image] =>[orig_patent_app_number] => 617208
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/617208 | High pressure nitridation of tungsten | Mar 17, 1996 | Issued |
Array
(
[id] => 4004729
[patent_doc_number] => 05960320
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-28
[patent_title] => 'Metal wiring layer forming method for semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/610442
[patent_app_country] => US
[patent_app_date] => 1996-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 16
[patent_no_of_words] => 3636
[patent_no_of_claims] => 31
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/960/05960320.pdf
[firstpage_image] =>[orig_patent_app_number] => 610442
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/610442 | Metal wiring layer forming method for semiconductor device | Mar 3, 1996 | Issued |
Array
(
[id] => 3994453
[patent_doc_number] => 05985769
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-16
[patent_title] => 'Method of forming an interlayer insulating film'
[patent_app_type] => 1
[patent_app_number] => 8/601658
[patent_app_country] => US
[patent_app_date] => 1996-02-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/985/05985769.pdf
[firstpage_image] =>[orig_patent_app_number] => 601658
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/601658 | Method of forming an interlayer insulating film | Feb 13, 1996 | Issued |
Array
(
[id] => 3945715
[patent_doc_number] => 05953634
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/600026
[patent_app_country] => US
[patent_app_date] => 1996-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 31163
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[pdf_file] => patents/05/953/05953634.pdf
[firstpage_image] =>[orig_patent_app_number] => 600026
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/600026 | Method of manufacturing semiconductor device | Feb 11, 1996 | Issued |
Array
(
[id] => 4191690
[patent_doc_number] => 06130158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-10
[patent_title] => 'Filling connection hole with wiring material by using centrifugal force'
[patent_app_type] => 1
[patent_app_number] => 8/599646
[patent_app_country] => US
[patent_app_date] => 1996-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3883
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[pdf_file] => patents/06/130/06130158.pdf
[firstpage_image] =>[orig_patent_app_number] => 599646
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/599646 | Filling connection hole with wiring material by using centrifugal force | Feb 11, 1996 | Issued |
Array
(
[id] => 4151616
[patent_doc_number] => 06124142
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-09-26
[patent_title] => 'Method for analyzing minute foreign substance elements'
[patent_app_type] => 1
[patent_app_number] => 8/600142
[patent_app_country] => US
[patent_app_date] => 1996-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 11772
[patent_no_of_claims] => 24
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[patent_words_short_claim] => 182
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[pdf_file] => patents/06/124/06124142.pdf
[firstpage_image] =>[orig_patent_app_number] => 600142
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/600142 | Method for analyzing minute foreign substance elements | Feb 11, 1996 | Issued |
Array
(
[id] => 3774256
[patent_doc_number] => 05817575
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Prevention of clogging in CVD apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/594058
[patent_app_country] => US
[patent_app_date] => 1996-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/817/05817575.pdf
[firstpage_image] =>[orig_patent_app_number] => 594058
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/594058 | Prevention of clogging in CVD apparatus | Jan 29, 1996 | Issued |
Array
(
[id] => 3968772
[patent_doc_number] => 05904514
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-18
[patent_title] => 'Method for producing electrodes of semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/591265
[patent_app_country] => US
[patent_app_date] => 1996-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 8116
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[pdf_file] => patents/05/904/05904514.pdf
[firstpage_image] =>[orig_patent_app_number] => 591265
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/591265 | Method for producing electrodes of semiconductor device | Jan 24, 1996 | Issued |
Array
(
[id] => 3945665
[patent_doc_number] => 05953631
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'Low stress, highly conformal CVD metal thin film'
[patent_app_type] => 1
[patent_app_number] => 8/592870
[patent_app_country] => US
[patent_app_date] => 1996-01-24
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[pdf_file] => patents/05/953/05953631.pdf
[firstpage_image] =>[orig_patent_app_number] => 592870
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/592870 | Low stress, highly conformal CVD metal thin film | Jan 23, 1996 | Issued |
Array
(
[id] => 3873315
[patent_doc_number] => 05824599
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-20
[patent_title] => 'Protected encapsulation of catalytic layer for electroless copper interconnect'
[patent_app_type] => 1
[patent_app_number] => 8/587264
[patent_app_country] => US
[patent_app_date] => 1996-01-16
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[pdf_file] => patents/05/824/05824599.pdf
[firstpage_image] =>[orig_patent_app_number] => 587264
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/587264 | Protected encapsulation of catalytic layer for electroless copper interconnect | Jan 15, 1996 | Issued |
| 08/587147 | INTEGRATED TUNGSTEN-SILICIDE PROCESSES | Jan 15, 1996 | Abandoned |
Array
(
[id] => 3942533
[patent_doc_number] => 05946594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants'
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[patent_app_number] => 8/581765
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/581765 | Chemical vapor deposition of titanium from titanium tetrachloride and hydrocarbon reactants | Jan 1, 1996 | Issued |
Array
(
[id] => 3967364
[patent_doc_number] => 05956613
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[patent_issue_date] => 1999-09-21
[patent_title] => 'Method for improvement of TiN CVD film quality'
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[patent_app_country] => US
[patent_app_date] => 1995-12-27
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[pdf_file] => patents/05/956/05956613.pdf
[firstpage_image] =>[orig_patent_app_number] => 579383
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579383 | Method for improvement of TiN CVD film quality | Dec 26, 1995 | Issued |
Array
(
[id] => 4024510
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[firstpage_image] =>[orig_patent_app_number] => 578127
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/578127 | Method of producing semiconductor device | Dec 25, 1995 | Issued |
Array
(
[id] => 3889453
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[pdf_file] => patents/05/834/05834372.pdf
[firstpage_image] =>[orig_patent_app_number] => 571052
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/571052 | Pretreatment of semiconductor substrate | Dec 11, 1995 | Issued |
Array
(
[id] => 3994190
[patent_doc_number] => 05985751
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[patent_issue_date] => 1999-11-16
[patent_title] => 'Process for fabricating interconnection of semiconductor device'
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[pdf_file] => patents/05/985/05985751.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/568667 | Process for fabricating interconnection of semiconductor device | Dec 6, 1995 | Issued |
Array
(
[id] => 3832501
[patent_doc_number] => 05814560
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[patent_issue_date] => 1998-09-29
[patent_title] => 'Metallization sidewall passivation technology for deep sub-half micrometer IC applications'
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 574557
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