Search

Renee R. Berry

Examiner (ID: 18563)

Most Active Art Unit
2818
Art Unit(s)
2829, 1762, 2891, 1109, 1104, 2813, 1792, 2818
Total Applications
592
Issued Applications
546
Pending Applications
22
Abandoned Applications
24

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 741793 [patent_doc_number] => 07030168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Supercritical fluid-assisted deposition of materials on semiconductor substrates' [patent_app_type] => utility [patent_app_number] => 10/303479 [patent_app_country] => US [patent_app_date] => 2002-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4175 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/030/07030168.pdf [firstpage_image] =>[orig_patent_app_number] => 10303479 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/303479
Supercritical fluid-assisted deposition of materials on semiconductor substrates Nov 24, 2002 Issued
Array ( [id] => 7061277 [patent_doc_number] => 20050003638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/497263 [patent_app_country] => US [patent_app_date] => 2002-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4064 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20050003638.pdf [firstpage_image] =>[orig_patent_app_number] => 10497263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/497263
Method of manufacturing a semiconductor device Nov 19, 2002 Issued
Array ( [id] => 7472357 [patent_doc_number] => 20040097099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Method of forming a semiconductor device with a substantially uniform density low-k dielectric layer' [patent_app_type] => new [patent_app_number] => 10/295609 [patent_app_country] => US [patent_app_date] => 2002-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3269 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20040097099.pdf [firstpage_image] =>[orig_patent_app_number] => 10295609 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/295609
Method of forming a semiconductor device with a substantially uniform density low-k dielectric layer Nov 14, 2002 Issued
Array ( [id] => 6816840 [patent_doc_number] => 20030067798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Configurable nanoscale crossbar electronic circuits made by electrochemical reaction' [patent_app_type] => new [patent_app_number] => 10/289703 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4933 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20030067798.pdf [firstpage_image] =>[orig_patent_app_number] => 10289703 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/289703
Configurable nanoscale crossbar electronic circuits made by electrochemical reaction Nov 5, 2002 Issued
Array ( [id] => 1209397 [patent_doc_number] => 06713385 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-30 [patent_title] => 'Implanting ions in shallow trench isolation structures' [patent_app_type] => B1 [patent_app_number] => 10/285109 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2313 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/713/06713385.pdf [firstpage_image] =>[orig_patent_app_number] => 10285109 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285109
Implanting ions in shallow trench isolation structures Oct 30, 2002 Issued
Array ( [id] => 6657157 [patent_doc_number] => 20030077844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Ferroelectric memory devices and methods of fabrication' [patent_app_type] => new [patent_app_number] => 10/273115 [patent_app_country] => US [patent_app_date] => 2002-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4428 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20030077844.pdf [firstpage_image] =>[orig_patent_app_number] => 10273115 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/273115
Methods of forming ferroelectric memory devices Oct 16, 2002 Issued
Array ( [id] => 1235704 [patent_doc_number] => 06689665 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-10 [patent_title] => 'Method of forming an STI feature while avoiding or reducing divot formation' [patent_app_type] => B1 [patent_app_number] => 10/269309 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 12 [patent_no_of_words] => 3296 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/689/06689665.pdf [firstpage_image] =>[orig_patent_app_number] => 10269309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/269309
Method of forming an STI feature while avoiding or reducing divot formation Oct 10, 2002 Issued
Array ( [id] => 6870163 [patent_doc_number] => 20030082852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Flip chip package and method for forming the same' [patent_app_type] => new [patent_app_number] => 10/269910 [patent_app_country] => US [patent_app_date] => 2002-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1385 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0082/20030082852.pdf [firstpage_image] =>[orig_patent_app_number] => 10269910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/269910
Flip chip package and method for forming the same Oct 10, 2002 Issued
Array ( [id] => 1107769 [patent_doc_number] => 06809029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-26 [patent_title] => 'Semiconductor production device and production method for semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/149858 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 7634 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809029.pdf [firstpage_image] =>[orig_patent_app_number] => 10149858 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/149858
Semiconductor production device and production method for semiconductor device Oct 6, 2002 Issued
Array ( [id] => 1181122 [patent_doc_number] => 06737364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Method for fabricating crystalline-dielectric thin films and devices formed using same' [patent_app_type] => B2 [patent_app_number] => 10/266000 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 24 [patent_no_of_words] => 4100 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/737/06737364.pdf [firstpage_image] =>[orig_patent_app_number] => 10266000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/266000
Method for fabricating crystalline-dielectric thin films and devices formed using same Oct 6, 2002 Issued
Array ( [id] => 7280846 [patent_doc_number] => 20040063223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-01 [patent_title] => 'Spacer integration scheme in MRAM technology' [patent_app_type] => new [patent_app_number] => 10/261709 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2870 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20040063223.pdf [firstpage_image] =>[orig_patent_app_number] => 10261709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261709
Spacer integration scheme in MRAM technology Sep 30, 2002 Issued
Array ( [id] => 6843218 [patent_doc_number] => 20030148565 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Method for forming thin semiconductor film, method for fabricating semiconductor device, system for executing these methods and electrooptic device' [patent_app_type] => new [patent_app_number] => 10/240439 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 37953 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20030148565.pdf [firstpage_image] =>[orig_patent_app_number] => 10240439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/240439
Method for forming thin semiconductor film, method for fabricating semiconductor device, system for executing these methods and electrooptic device Sep 30, 2002 Abandoned
Array ( [id] => 1025521 [patent_doc_number] => 06885070 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Semiconductor memory device and fabrication method thereof' [patent_app_type] => utility [patent_app_number] => 10/259871 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 5179 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885070.pdf [firstpage_image] =>[orig_patent_app_number] => 10259871 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/259871
Semiconductor memory device and fabrication method thereof Sep 29, 2002 Issued
Array ( [id] => 6674456 [patent_doc_number] => 20030060059 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Versatile plasma processing system for producing oxidation resistant barriers' [patent_app_type] => new [patent_app_number] => 10/253338 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2914 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20030060059.pdf [firstpage_image] =>[orig_patent_app_number] => 10253338 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253338
Versatile plasma processing system for producing oxidation resistant barriers Sep 23, 2002 Issued
Array ( [id] => 1205506 [patent_doc_number] => 06716698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Virtual ground silicide bit line process for floating gate flash memory' [patent_app_type] => B1 [patent_app_number] => 10/238412 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4457 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/716/06716698.pdf [firstpage_image] =>[orig_patent_app_number] => 10238412 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238412
Virtual ground silicide bit line process for floating gate flash memory Sep 9, 2002 Issued
Array ( [id] => 1273005 [patent_doc_number] => 06653742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Semiconductor chip assembly with interlocked conductive trace' [patent_app_type] => B1 [patent_app_number] => 10/235331 [patent_app_country] => US [patent_app_date] => 2002-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 121 [patent_no_of_words] => 12334 [patent_no_of_claims] => 101 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653742.pdf [firstpage_image] =>[orig_patent_app_number] => 10235331 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/235331
Semiconductor chip assembly with interlocked conductive trace Sep 4, 2002 Issued
Array ( [id] => 7135042 [patent_doc_number] => 20040043516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'MAGNETIC SHIELDING FOR REDUCING MAGNETIC INTERFERENCE' [patent_app_type] => new [patent_app_number] => 10/232209 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8367 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043516.pdf [firstpage_image] =>[orig_patent_app_number] => 10232209 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232209
Magnetic shielding for reducing magnetic interference Aug 29, 2002 Issued
Array ( [id] => 6317181 [patent_doc_number] => 20020195709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Method for forming a metallization layer' [patent_app_type] => new [patent_app_number] => 10/217620 [patent_app_country] => US [patent_app_date] => 2002-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1925 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20020195709.pdf [firstpage_image] =>[orig_patent_app_number] => 10217620 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217620
Method for forming a metallization layer Aug 12, 2002 Issued
Array ( [id] => 6778817 [patent_doc_number] => 20030049898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Method for fabricating a P-N heterojunction device utilizing HVPE grown III-V compound layers and resultant device' [patent_app_type] => new [patent_app_number] => 10/217309 [patent_app_country] => US [patent_app_date] => 2002-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4494 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20030049898.pdf [firstpage_image] =>[orig_patent_app_number] => 10217309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217309
Method for fabricating a P-N heterojunction device utilizing HVPE grown III-V compound layers and resultant device Aug 8, 2002 Issued
Array ( [id] => 6817887 [patent_doc_number] => 20030068845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Flash device having trench source line' [patent_app_type] => new [patent_app_number] => 10/208804 [patent_app_country] => US [patent_app_date] => 2002-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2107 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20030068845.pdf [firstpage_image] =>[orig_patent_app_number] => 10208804 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/208804
Flash device having trench source line Jul 31, 2002 Abandoned
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