Search

Renzo Rocchegiani

Examiner (ID: 276)

Most Active Art Unit
2825
Art Unit(s)
2813, 2825
Total Applications
253
Issued Applications
222
Pending Applications
9
Abandoned Applications
22

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1110911 [patent_doc_number] => 06806138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-19 [patent_title] => 'Integration scheme for enhancing capacitance of trench capacitors' [patent_app_type] => B1 [patent_app_number] => 10/707890 [patent_app_country] => US [patent_app_date] => 2004-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3323 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806138.pdf [firstpage_image] =>[orig_patent_app_number] => 10707890 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/707890
Integration scheme for enhancing capacitance of trench capacitors Jan 20, 2004 Issued
Array ( [id] => 1132174 [patent_doc_number] => 06787803 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Test patterns for measurement of low-k dielectric cracking thresholds' [patent_app_type] => B1 [patent_app_number] => 10/602970 [patent_app_country] => US [patent_app_date] => 2003-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3242 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787803.pdf [firstpage_image] =>[orig_patent_app_number] => 10602970 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/602970
Test patterns for measurement of low-k dielectric cracking thresholds Jun 23, 2003 Issued
Array ( [id] => 7252745 [patent_doc_number] => 20040259274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'METHOD OF PATTERNING A MAGNETIC MEMORY CELL BOTTOM ELECTRODE BEFORE MAGNETIC STACK DEPOSITION' [patent_app_type] => new [patent_app_number] => 10/600920 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4080 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20040259274.pdf [firstpage_image] =>[orig_patent_app_number] => 10600920 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600920
Method of patterning a magnetic memory cell bottom electrode before magnetic stack deposition Jun 19, 2003 Issued
Array ( [id] => 1101652 [patent_doc_number] => 06815294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 10/388450 [patent_app_country] => US [patent_app_date] => 2003-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 2846 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815294.pdf [firstpage_image] =>[orig_patent_app_number] => 10388450 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/388450
Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof Mar 16, 2003 Issued
Array ( [id] => 1056380 [patent_doc_number] => 06855603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/387561 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 2843 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/855/06855603.pdf [firstpage_image] =>[orig_patent_app_number] => 10387561 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/387561
Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof Mar 13, 2003 Issued
Array ( [id] => 1040508 [patent_doc_number] => 06869806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Method and apparatus for the production of a semiconductor compatible ferromagnetic film' [patent_app_type] => utility [patent_app_number] => 10/468720 [patent_app_country] => US [patent_app_date] => 2003-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2249 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/869/06869806.pdf [firstpage_image] =>[orig_patent_app_number] => 10468720 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/468720
Method and apparatus for the production of a semiconductor compatible ferromagnetic film Mar 13, 2003 Issued
Array ( [id] => 6803388 [patent_doc_number] => 20030230782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/386536 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 2875 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20030230782.pdf [firstpage_image] =>[orig_patent_app_number] => 10386536 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/386536
Vertical nano-size transistor using carbon nanotubes and manufacturing method thereof Mar 12, 2003 Issued
Array ( [id] => 7221721 [patent_doc_number] => 20040072387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Method of fabricating and mounting flip chips' [patent_app_type] => new [patent_app_number] => 10/372280 [patent_app_country] => US [patent_app_date] => 2003-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4915 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20040072387.pdf [firstpage_image] =>[orig_patent_app_number] => 10372280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/372280
Method of fabricating and mounting flip chips Feb 24, 2003 Issued
Array ( [id] => 1146072 [patent_doc_number] => 06773956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Method for contact-connecting a semiconductor component' [patent_app_type] => B2 [patent_app_number] => 10/352680 [patent_app_country] => US [patent_app_date] => 2003-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2103 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/773/06773956.pdf [firstpage_image] =>[orig_patent_app_number] => 10352680 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/352680
Method for contact-connecting a semiconductor component Jan 27, 2003 Issued
Array ( [id] => 1073730 [patent_doc_number] => 06838395 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-04 [patent_title] => 'Method for fabricating a semiconductor crystal' [patent_app_type] => utility [patent_app_number] => 10/330080 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5485 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/838/06838395.pdf [firstpage_image] =>[orig_patent_app_number] => 10330080 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330080
Method for fabricating a semiconductor crystal Dec 29, 2002 Issued
Array ( [id] => 7398701 [patent_doc_number] => 20040018656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Method for improving contact hole patterning' [patent_app_type] => new [patent_app_number] => 10/065780 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2202 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20040018656.pdf [firstpage_image] =>[orig_patent_app_number] => 10065780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/065780
Method for improving contact hole patterning Nov 17, 2002 Issued
Array ( [id] => 6761438 [patent_doc_number] => 20030124800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method of forming a floating gate in a flash memory device' [patent_app_type] => new [patent_app_number] => 10/286980 [patent_app_country] => US [patent_app_date] => 2002-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2536 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20030124800.pdf [firstpage_image] =>[orig_patent_app_number] => 10286980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286980
Method of forming a floating gate in a flash memory device Nov 3, 2002 Issued
Array ( [id] => 6783161 [patent_doc_number] => 20030064608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition' [patent_app_type] => new [patent_app_number] => 10/255051 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4591 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0064/20030064608.pdf [firstpage_image] =>[orig_patent_app_number] => 10255051 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/255051
Polymeric antireflective coatings deposited by plasma enhanced chemical vapor deposition Sep 23, 2002 Abandoned
Array ( [id] => 1092842 [patent_doc_number] => 06825092 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Semiconductor device having passive elements and method of making same' [patent_app_type] => B2 [patent_app_number] => 10/243587 [patent_app_country] => US [patent_app_date] => 2002-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2939 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825092.pdf [firstpage_image] =>[orig_patent_app_number] => 10243587 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/243587
Semiconductor device having passive elements and method of making same Sep 12, 2002 Issued
Array ( [id] => 6668467 [patent_doc_number] => 20030113450 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Method of forming floating structure of substrate and method of manufacturing floating structure gate electrode and field emission device employing the floating structure' [patent_app_type] => new [patent_app_number] => 10/238780 [patent_app_country] => US [patent_app_date] => 2002-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5539 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20030113450.pdf [firstpage_image] =>[orig_patent_app_number] => 10238780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/238780
Method of forming floating structure of substrate and method of manufacturing floating structure gate electrode and field emission device employing the floating structure Sep 10, 2002 Issued
Array ( [id] => 7135187 [patent_doc_number] => 20040043586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/232980 [patent_app_country] => US [patent_app_date] => 2002-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2552 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20040043586.pdf [firstpage_image] =>[orig_patent_app_number] => 10232980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/232980
Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device Aug 28, 2002 Issued
Array ( [id] => 6674411 [patent_doc_number] => 20030060014 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Field effect transistor configuration with high latch-up resistance, and method for its production' [patent_app_type] => new [patent_app_number] => 10/229980 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4461 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20030060014.pdf [firstpage_image] =>[orig_patent_app_number] => 10229980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229980
Field effect transistor configuration with high latch-up resistance, and method for its production Aug 27, 2002 Abandoned
Array ( [id] => 1273649 [patent_doc_number] => 06649437 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Method of manufacturing high-power light emitting diodes' [patent_app_type] => B1 [patent_app_number] => 10/224980 [patent_app_country] => US [patent_app_date] => 2002-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1422 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649437.pdf [firstpage_image] =>[orig_patent_app_number] => 10224980 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/224980
Method of manufacturing high-power light emitting diodes Aug 19, 2002 Issued
Array ( [id] => 6692730 [patent_doc_number] => 20030040162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-27 [patent_title] => 'Method for fabricating a capacitor' [patent_app_type] => new [patent_app_number] => 10/223280 [patent_app_country] => US [patent_app_date] => 2002-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3819 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20030040162.pdf [firstpage_image] =>[orig_patent_app_number] => 10223280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/223280
Method for fabricating a capacitor Aug 18, 2002 Abandoned
Array ( [id] => 6530845 [patent_doc_number] => 20020192942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Composition compatible with aluminum planarization and methods therefore' [patent_app_type] => new [patent_app_number] => 10/212329 [patent_app_country] => US [patent_app_date] => 2002-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5121 [patent_no_of_claims] => 130 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20020192942.pdf [firstpage_image] =>[orig_patent_app_number] => 10212329 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212329
Composition compatible with aluminum planarization and methods therefore Aug 4, 2002 Issued
Menu