Search

Renzo Rocchegiani

Examiner (ID: 276)

Most Active Art Unit
2825
Art Unit(s)
2813, 2825
Total Applications
253
Issued Applications
222
Pending Applications
9
Abandoned Applications
22

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6688509 [patent_doc_number] => 20030032234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Semiconductor integrated circuit device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/208780 [patent_app_country] => US [patent_app_date] => 2002-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 12384 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032234.pdf [firstpage_image] =>[orig_patent_app_number] => 10208780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/208780
Semiconductor integrated circuit device and method of manufacturing the same Jul 31, 2002 Issued
Array ( [id] => 6688502 [patent_doc_number] => 20030032227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'MOSFET, semiconductor device using the same and production process therefor' [patent_app_type] => new [patent_app_number] => 10/202080 [patent_app_country] => US [patent_app_date] => 2002-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4838 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20030032227.pdf [firstpage_image] =>[orig_patent_app_number] => 10202080 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202080
MOSFET, semiconductor device using the same and production process therefor Jul 24, 2002 Issued
Array ( [id] => 6761459 [patent_doc_number] => 20030124821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Versatile system for forming shallow semiconductor device features' [patent_app_type] => new [patent_app_number] => 10/205380 [patent_app_country] => US [patent_app_date] => 2002-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3949 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20030124821.pdf [firstpage_image] =>[orig_patent_app_number] => 10205380 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/205380
Versatile system for forming shallow semiconductor device features Jul 23, 2002 Abandoned
Array ( [id] => 1248128 [patent_doc_number] => 06673635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-06 [patent_title] => 'Method for alignment mark formation for a shallow trench isolation process' [patent_app_type] => B1 [patent_app_number] => 10/185780 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4535 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/673/06673635.pdf [firstpage_image] =>[orig_patent_app_number] => 10185780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185780
Method for alignment mark formation for a shallow trench isolation process Jun 27, 2002 Issued
Array ( [id] => 1332390 [patent_doc_number] => 06596608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method of manufacturing non-volatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/177280 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 67 [patent_no_of_words] => 10601 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/596/06596608.pdf [firstpage_image] =>[orig_patent_app_number] => 10177280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/177280
Method of manufacturing non-volatile semiconductor memory device Jun 20, 2002 Issued
Array ( [id] => 1228257 [patent_doc_number] => 06696350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-24 [patent_title] => 'Method of fabricating memory device' [patent_app_type] => B2 [patent_app_number] => 10/064140 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 2388 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/696/06696350.pdf [firstpage_image] =>[orig_patent_app_number] => 10064140 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064140
Method of fabricating memory device Jun 12, 2002 Issued
Array ( [id] => 6444985 [patent_doc_number] => 20020149100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => ' Vertically mountable interposer, assembly and method' [patent_app_type] => new [patent_app_number] => 10/165158 [patent_app_country] => US [patent_app_date] => 2002-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4267 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20020149100.pdf [firstpage_image] =>[orig_patent_app_number] => 10165158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/165158
Vertically mountable interposer and assembly Jun 5, 2002 Issued
Array ( [id] => 5906895 [patent_doc_number] => 20020142581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Interconnection structure and method for fabricating same' [patent_app_type] => new [patent_app_number] => 10/159181 [patent_app_country] => US [patent_app_date] => 2002-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4813 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142581.pdf [firstpage_image] =>[orig_patent_app_number] => 10159181 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/159181
Interconnection structure and method for fabricating same May 30, 2002 Issued
Array ( [id] => 6856312 [patent_doc_number] => 20030129813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films' [patent_app_type] => new [patent_app_number] => 10/158540 [patent_app_country] => US [patent_app_date] => 2002-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4060 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20030129813.pdf [firstpage_image] =>[orig_patent_app_number] => 10158540 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/158540
Schottky diode with silver layer contacting the ZnO and MgxZn1-xO films May 29, 2002 Issued
Array ( [id] => 1043670 [patent_doc_number] => 06867103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Method of fabricating an ESD device on SOI' [patent_app_type] => utility [patent_app_number] => 10/154740 [patent_app_country] => US [patent_app_date] => 2002-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 3912 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867103.pdf [firstpage_image] =>[orig_patent_app_number] => 10154740 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/154740
Method of fabricating an ESD device on SOI May 23, 2002 Issued
Array ( [id] => 7964353 [patent_doc_number] => 06680250 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-20 [patent_title] => 'Formation of deep amorphous region to separate junction from end-of-range defects' [patent_app_type] => B1 [patent_app_number] => 10/145740 [patent_app_country] => US [patent_app_date] => 2002-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3298 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/680/06680250.pdf [firstpage_image] =>[orig_patent_app_number] => 10145740 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/145740
Formation of deep amorphous region to separate junction from end-of-range defects May 15, 2002 Issued
Array ( [id] => 1205430 [patent_doc_number] => 06716668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-06 [patent_title] => 'Method for forming semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/143910 [patent_app_country] => US [patent_app_date] => 2002-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1270 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/716/06716668.pdf [firstpage_image] =>[orig_patent_app_number] => 10143910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/143910
Method for forming semiconductor device May 13, 2002 Issued
Array ( [id] => 7634847 [patent_doc_number] => 06656771 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-02 [patent_title] => 'Semiconductor device, method of connecting a semiconductor chip, circuit board, and electronic equipment' [patent_app_type] => B2 [patent_app_number] => 10/141954 [patent_app_country] => US [patent_app_date] => 2002-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 6059 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/656/06656771.pdf [firstpage_image] =>[orig_patent_app_number] => 10141954 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/141954
Semiconductor device, method of connecting a semiconductor chip, circuit board, and electronic equipment May 9, 2002 Issued
Array ( [id] => 6111422 [patent_doc_number] => 20020173132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-21 [patent_title] => 'Integrated circuit having an antifuse and a method of manufacture' [patent_app_type] => new [patent_app_number] => 10/135580 [patent_app_country] => US [patent_app_date] => 2002-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2471 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20020173132.pdf [firstpage_image] =>[orig_patent_app_number] => 10135580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/135580
Integrated circuit having an antifuse and a method of manufacture Apr 29, 2002 Issued
Array ( [id] => 1315511 [patent_doc_number] => 06607968 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method for making a silicon substrate comprising a buried thin silicon oxide film' [patent_app_type] => B1 [patent_app_number] => 10/018680 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2621 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/607/06607968.pdf [firstpage_image] =>[orig_patent_app_number] => 10018680 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/018680
Method for making a silicon substrate comprising a buried thin silicon oxide film Apr 21, 2002 Issued
Array ( [id] => 1155706 [patent_doc_number] => 06764920 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-20 [patent_title] => 'Method for reducing shallow trench isolation edge thinning on tunnel oxides using partial nitride strip and small bird\'s beak formation for high performance flash memory devices' [patent_app_type] => B1 [patent_app_number] => 10/126840 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3805 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/764/06764920.pdf [firstpage_image] =>[orig_patent_app_number] => 10126840 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126840
Method for reducing shallow trench isolation edge thinning on tunnel oxides using partial nitride strip and small bird's beak formation for high performance flash memory devices Apr 18, 2002 Issued
Array ( [id] => 5906777 [patent_doc_number] => 20020142547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method of fabricating gate' [patent_app_type] => new [patent_app_number] => 10/121286 [patent_app_country] => US [patent_app_date] => 2002-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3380 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142547.pdf [firstpage_image] =>[orig_patent_app_number] => 10121286 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/121286
Method of fabricating gate Apr 11, 2002 Abandoned
Array ( [id] => 1312032 [patent_doc_number] => 06610554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-26 [patent_title] => 'Method of fabricating organic electroluminescent display' [patent_app_type] => B2 [patent_app_number] => 10/119780 [patent_app_country] => US [patent_app_date] => 2002-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4274 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/610/06610554.pdf [firstpage_image] =>[orig_patent_app_number] => 10119780 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/119780
Method of fabricating organic electroluminescent display Apr 10, 2002 Issued
Array ( [id] => 1239715 [patent_doc_number] => 06686279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Method for reducing gouging during via formation' [patent_app_type] => B2 [patent_app_number] => 10/114680 [patent_app_country] => US [patent_app_date] => 2002-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3593 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686279.pdf [firstpage_image] =>[orig_patent_app_number] => 10114680 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/114680
Method for reducing gouging during via formation Mar 31, 2002 Issued
Array ( [id] => 1130557 [patent_doc_number] => 06787462 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method of manufacturing semiconductor device having buried metal wiring' [patent_app_type] => B2 [patent_app_number] => 10/107040 [patent_app_country] => US [patent_app_date] => 2002-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8405 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787462.pdf [firstpage_image] =>[orig_patent_app_number] => 10107040 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/107040
Method of manufacturing semiconductor device having buried metal wiring Mar 27, 2002 Issued
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