Search

Renzo Rocchegiani

Examiner (ID: 276)

Most Active Art Unit
2825
Art Unit(s)
2813, 2825
Total Applications
253
Issued Applications
222
Pending Applications
9
Abandoned Applications
22

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1318443 [patent_doc_number] => 06605526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Wirebond passivation pad connection using heated capillary' [patent_app_type] => B1 [patent_app_number] => 09/527141 [patent_app_country] => US [patent_app_date] => 2000-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1514 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605526.pdf [firstpage_image] =>[orig_patent_app_number] => 09527141 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/527141
Wirebond passivation pad connection using heated capillary Mar 15, 2000 Issued
Array ( [id] => 1216585 [patent_doc_number] => 06706647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method of and apparatus for manufacturing semiconductors' [patent_app_type] => B1 [patent_app_number] => 09/524510 [patent_app_country] => US [patent_app_date] => 2000-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4366 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/706/06706647.pdf [firstpage_image] =>[orig_patent_app_number] => 09524510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/524510
Method of and apparatus for manufacturing semiconductors Mar 12, 2000 Issued
Array ( [id] => 1550201 [patent_doc_number] => 06399414 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Method for forming semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/522921 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 1229 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/399/06399414.pdf [firstpage_image] =>[orig_patent_app_number] => 09522921 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/522921
Method for forming semiconductor device Mar 9, 2000 Issued
Array ( [id] => 1477749 [patent_doc_number] => 06344416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions' [patent_app_type] => B1 [patent_app_number] => 09/523480 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 7705 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344416.pdf [firstpage_image] =>[orig_patent_app_number] => 09523480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523480
Deliberate semiconductor film variation to compensate for radial processing differences, determine optimal device characteristics, or produce small productions Mar 9, 2000 Issued
Array ( [id] => 1549599 [patent_doc_number] => 06346433 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Method of coating semiconductor wafer with resin and mold used therefor' [patent_app_type] => B1 [patent_app_number] => 09/523420 [patent_app_country] => US [patent_app_date] => 2000-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4517 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/346/06346433.pdf [firstpage_image] =>[orig_patent_app_number] => 09523420 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/523420
Method of coating semiconductor wafer with resin and mold used therefor Mar 9, 2000 Issued
Array ( [id] => 1272825 [patent_doc_number] => 06653701 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Semiconductor device and production method thereof' [patent_app_type] => B1 [patent_app_number] => 09/520441 [patent_app_country] => US [patent_app_date] => 2000-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 17580 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/653/06653701.pdf [firstpage_image] =>[orig_patent_app_number] => 09520441 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/520441
Semiconductor device and production method thereof Mar 6, 2000 Issued
Array ( [id] => 1588882 [patent_doc_number] => 06482721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Method of manufacturing a polysilicon active layer in a thin film transistor' [patent_app_type] => B1 [patent_app_number] => 09/518980 [patent_app_country] => US [patent_app_date] => 2000-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 2896 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482721.pdf [firstpage_image] =>[orig_patent_app_number] => 09518980 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/518980
Method of manufacturing a polysilicon active layer in a thin film transistor Mar 2, 2000 Issued
Array ( [id] => 1550385 [patent_doc_number] => 06399465 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Method for forming a triple well structure' [patent_app_type] => B1 [patent_app_number] => 09/513270 [patent_app_country] => US [patent_app_date] => 2000-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1526 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/399/06399465.pdf [firstpage_image] =>[orig_patent_app_number] => 09513270 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/513270
Method for forming a triple well structure Feb 23, 2000 Issued
Array ( [id] => 4354780 [patent_doc_number] => 06218315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'HTO (high temperature oxide) deposition for capacitor dielectrics' [patent_app_type] => 1 [patent_app_number] => 9/512721 [patent_app_country] => US [patent_app_date] => 2000-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218315.pdf [firstpage_image] =>[orig_patent_app_number] => 512721 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/512721
HTO (high temperature oxide) deposition for capacitor dielectrics Feb 23, 2000 Issued
Array ( [id] => 1588848 [patent_doc_number] => 06482714 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/512320 [patent_app_country] => US [patent_app_date] => 2000-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 32 [patent_no_of_words] => 11191 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482714.pdf [firstpage_image] =>[orig_patent_app_number] => 09512320 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/512320
Semiconductor device and method of manufacturing the same Feb 23, 2000 Issued
Array ( [id] => 4327230 [patent_doc_number] => 06319811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-20 [patent_title] => 'Bond ply structure and associated process for interconnection of circuit layer pairs with conductive inks' [patent_app_type] => 1 [patent_app_number] => 9/510574 [patent_app_country] => US [patent_app_date] => 2000-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1552 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/319/06319811.pdf [firstpage_image] =>[orig_patent_app_number] => 510574 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/510574
Bond ply structure and associated process for interconnection of circuit layer pairs with conductive inks Feb 21, 2000 Issued
Array ( [id] => 1409403 [patent_doc_number] => 06528377 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Semiconductor substrate and method for preparing the same' [patent_app_type] => B1 [patent_app_number] => 09/501950 [patent_app_country] => US [patent_app_date] => 2000-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3394 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528377.pdf [firstpage_image] =>[orig_patent_app_number] => 09501950 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/501950
Semiconductor substrate and method for preparing the same Feb 9, 2000 Issued
Array ( [id] => 1542669 [patent_doc_number] => 06372610 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method for die separation of a wafer by ion implantation' [patent_app_type] => B1 [patent_app_number] => 09/500790 [patent_app_country] => US [patent_app_date] => 2000-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2644 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/372/06372610.pdf [firstpage_image] =>[orig_patent_app_number] => 09500790 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/500790
Method for die separation of a wafer by ion implantation Feb 9, 2000 Issued
Array ( [id] => 4380532 [patent_doc_number] => 06277660 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method and apparatus for testing chips' [patent_app_type] => 1 [patent_app_number] => 9/497437 [patent_app_country] => US [patent_app_date] => 2000-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5989 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/277/06277660.pdf [firstpage_image] =>[orig_patent_app_number] => 497437 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/497437
Method and apparatus for testing chips Feb 2, 2000 Issued
Array ( [id] => 7634853 [patent_doc_number] => 06656765 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Fabricating very thin chip size semiconductor packages' [patent_app_type] => B1 [patent_app_number] => 09/496991 [patent_app_country] => US [patent_app_date] => 2000-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3245 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/656/06656765.pdf [firstpage_image] =>[orig_patent_app_number] => 09496991 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/496991
Fabricating very thin chip size semiconductor packages Feb 1, 2000 Issued
Array ( [id] => 4483472 [patent_doc_number] => 07901977 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-08 [patent_title] => 'Data protection by detection of intrusion into electronic assemblies' [patent_app_type] => utility [patent_app_number] => 09/492210 [patent_app_country] => US [patent_app_date] => 2000-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 5056 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/901/07901977.pdf [firstpage_image] =>[orig_patent_app_number] => 09492210 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/492210
Data protection by detection of intrusion into electronic assemblies Jan 26, 2000 Issued
Array ( [id] => 4182048 [patent_doc_number] => 06150207 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Method for fabricating a crown capacitor with rough surface' [patent_app_type] => 1 [patent_app_number] => 9/491770 [patent_app_country] => US [patent_app_date] => 2000-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2263 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/150/06150207.pdf [firstpage_image] =>[orig_patent_app_number] => 491770 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491770
Method for fabricating a crown capacitor with rough surface Jan 25, 2000 Issued
Array ( [id] => 4380399 [patent_doc_number] => 06261855 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Method for fabricating a semiconductor optical device' [patent_app_type] => 1 [patent_app_number] => 9/491630 [patent_app_country] => US [patent_app_date] => 2000-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 3990 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/261/06261855.pdf [firstpage_image] =>[orig_patent_app_number] => 491630 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491630
Method for fabricating a semiconductor optical device Jan 25, 2000 Issued
Array ( [id] => 4235950 [patent_doc_number] => 06143641 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Structure and method for controlling copper diffusion and for utilizing low K materials for copper interconnects in integrated circuit structures' [patent_app_type] => 1 [patent_app_number] => 9/491250 [patent_app_country] => US [patent_app_date] => 2000-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2445 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143641.pdf [firstpage_image] =>[orig_patent_app_number] => 491250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491250
Structure and method for controlling copper diffusion and for utilizing low K materials for copper interconnects in integrated circuit structures Jan 25, 2000 Issued
Array ( [id] => 1485310 [patent_doc_number] => 06365493 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Method for antimony and boron doping of spherical semiconductors' [patent_app_type] => B1 [patent_app_number] => 09/490650 [patent_app_country] => US [patent_app_date] => 2000-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1524 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365493.pdf [firstpage_image] =>[orig_patent_app_number] => 09490650 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/490650
Method for antimony and boron doping of spherical semiconductors Jan 23, 2000 Issued
Menu