Search

Rhadames J Alonzo Miller

Examiner (ID: 10254, Phone: (571)270-7829 , Office: P/2847 )

Most Active Art Unit
2847
Art Unit(s)
2847, 2835, 2857
Total Applications
591
Issued Applications
362
Pending Applications
72
Abandoned Applications
157

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3505083 [patent_doc_number] => 05537536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Apparatus and method for debugging electronic components through an in-circuit emulator' [patent_app_type] => 1 [patent_app_number] => 8/575252 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 13392 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537536.pdf [firstpage_image] =>[orig_patent_app_number] => 575252 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575252
Apparatus and method for debugging electronic components through an in-circuit emulator Dec 19, 1995 Issued
Array ( [id] => 3518348 [patent_doc_number] => 05515499 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Method and system for reconfiguring a storage structure within a structure processing facility' [patent_app_type] => 1 [patent_app_number] => 8/544941 [patent_app_country] => US [patent_app_date] => 1995-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 63 [patent_no_of_words] => 39250 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/515/05515499.pdf [firstpage_image] =>[orig_patent_app_number] => 544941 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/544941
Method and system for reconfiguring a storage structure within a structure processing facility Oct 17, 1995 Issued
Array ( [id] => 3566968 [patent_doc_number] => 05500945 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-19 [patent_title] => 'Apparatus and method for controlling a system bus of a multiprocessor system' [patent_app_type] => 1 [patent_app_number] => 8/512440 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3079 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/500/05500945.pdf [firstpage_image] =>[orig_patent_app_number] => 512440 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512440
Apparatus and method for controlling a system bus of a multiprocessor system Jul 30, 1995 Issued
Array ( [id] => 3625838 [patent_doc_number] => 05535327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Method and apparatus for communicating formatted data from a mass storage device to a host computer' [patent_app_type] => 1 [patent_app_number] => 8/505557 [patent_app_country] => US [patent_app_date] => 1995-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5532 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 415 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535327.pdf [firstpage_image] =>[orig_patent_app_number] => 505557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/505557
Method and apparatus for communicating formatted data from a mass storage device to a host computer Jul 20, 1995 Issued
Array ( [id] => 3526550 [patent_doc_number] => 05513345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Searching system for determining alternative routes during failure in a network of links and nodes' [patent_app_type] => 1 [patent_app_number] => 8/405606 [patent_app_country] => US [patent_app_date] => 1995-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 57 [patent_no_of_words] => 13616 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/513/05513345.pdf [firstpage_image] =>[orig_patent_app_number] => 405606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405606
Searching system for determining alternative routes during failure in a network of links and nodes Mar 16, 1995 Issued
Array ( [id] => 3590158 [patent_doc_number] => 05491791 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'System and method for remote workstation monitoring within a distributed computing environment' [patent_app_type] => 1 [patent_app_number] => 8/372786 [patent_app_country] => US [patent_app_date] => 1995-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5055 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491791.pdf [firstpage_image] =>[orig_patent_app_number] => 372786 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/372786
System and method for remote workstation monitoring within a distributed computing environment Jan 12, 1995 Issued
08/356805 AUTOMATED SOFTWARE REGRESSION TEST AND COMPILATION SYSTEM Dec 14, 1994 Abandoned
Array ( [id] => 3605440 [patent_doc_number] => 05522036 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-28 [patent_title] => 'Method and apparatus for the automatic analysis of computer software' [patent_app_type] => 1 [patent_app_number] => 8/337262 [patent_app_country] => US [patent_app_date] => 1994-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 20757 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/522/05522036.pdf [firstpage_image] =>[orig_patent_app_number] => 337262 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/337262
Method and apparatus for the automatic analysis of computer software Nov 9, 1994 Issued
Array ( [id] => 3503060 [patent_doc_number] => 05561766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Cross-connecting system for making line connections between high-speed lines and low-speed lines and between high-speed lines and capable of detecting a line-connection error' [patent_app_type] => 1 [patent_app_number] => 8/300735 [patent_app_country] => US [patent_app_date] => 1994-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4405 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561766.pdf [firstpage_image] =>[orig_patent_app_number] => 300735 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/300735
Cross-connecting system for making line connections between high-speed lines and low-speed lines and between high-speed lines and capable of detecting a line-connection error Sep 1, 1994 Issued
Array ( [id] => 3590099 [patent_doc_number] => 05491787 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'Fault tolerant digital computer system having two processors which periodically alternate as master and slave' [patent_app_type] => 1 [patent_app_number] => 8/296302 [patent_app_country] => US [patent_app_date] => 1994-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6978 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491787.pdf [firstpage_image] =>[orig_patent_app_number] => 296302 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/296302
Fault tolerant digital computer system having two processors which periodically alternate as master and slave Aug 24, 1994 Issued
Array ( [id] => 3518448 [patent_doc_number] => 05515506 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Encoding and decoding of dual-ported RAM parity using one shared parity tree and within one clock cycle' [patent_app_type] => 1 [patent_app_number] => 8/294462 [patent_app_country] => US [patent_app_date] => 1994-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1755 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/515/05515506.pdf [firstpage_image] =>[orig_patent_app_number] => 294462 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/294462
Encoding and decoding of dual-ported RAM parity using one shared parity tree and within one clock cycle Aug 22, 1994 Issued
Array ( [id] => 3601092 [patent_doc_number] => 05517615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-14 [patent_title] => 'Multi-channel integrity checking data transfer system for controlling different size data block transfers with on-the-fly checkout of each word and data block transferred' [patent_app_type] => 1 [patent_app_number] => 8/255519 [patent_app_country] => US [patent_app_date] => 1994-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4214 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/517/05517615.pdf [firstpage_image] =>[orig_patent_app_number] => 255519 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/255519
Multi-channel integrity checking data transfer system for controlling different size data block transfers with on-the-fly checkout of each word and data block transferred Aug 14, 1994 Issued
08/289102 A SYSTEM AND METHOD FOR REMOTE MIRRORING OF DIGITAL DATA FROM A PRIMARY NETWORK SERVER TO A REMOTE NETWORK SEVER Aug 10, 1994 Issued
Array ( [id] => 3569174 [patent_doc_number] => 05544308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'Method for automating the development and execution of diagnostic reasoning software in products and processes' [patent_app_type] => 1 [patent_app_number] => 8/284382 [patent_app_country] => US [patent_app_date] => 1994-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9245 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544308.pdf [firstpage_image] =>[orig_patent_app_number] => 284382 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/284382
Method for automating the development and execution of diagnostic reasoning software in products and processes Aug 1, 1994 Issued
Array ( [id] => 3531806 [patent_doc_number] => 05530805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Failure analysis device for memory devices' [patent_app_type] => 1 [patent_app_number] => 8/280558 [patent_app_country] => US [patent_app_date] => 1994-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3431 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530805.pdf [firstpage_image] =>[orig_patent_app_number] => 280558 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/280558
Failure analysis device for memory devices Jul 25, 1994 Issued
08/272073 MICROCONTROLLER INTEGRATED CIRCUIT WITH READ ONLY MEMORY CONTAINING A GENERIC PROGRAM Jul 7, 1994 Abandoned
Array ( [id] => 3539425 [patent_doc_number] => 05528753 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'System and method for enabling stripped object software monitoring in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/269334 [patent_app_country] => US [patent_app_date] => 1994-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3334 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528753.pdf [firstpage_image] =>[orig_patent_app_number] => 269334 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/269334
System and method for enabling stripped object software monitoring in a computer system Jun 29, 1994 Issued
Array ( [id] => 3576601 [patent_doc_number] => 05483637 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-09 [patent_title] => 'Expert based system and method for managing error events in a local area network' [patent_app_type] => 1 [patent_app_number] => 8/266074 [patent_app_country] => US [patent_app_date] => 1994-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3793 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/483/05483637.pdf [firstpage_image] =>[orig_patent_app_number] => 266074 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/266074
Expert based system and method for managing error events in a local area network Jun 26, 1994 Issued
08/263134 APPARATUS AND METHOD FOR DEBUGGING ELECTRONIC COMPONENTS THROUGH AN ICE (IN-CIRCUIT EMULATOR) Jun 20, 1994 Abandoned
08/255138 METHOD AND APPARATUS FOR PRODUCING A SOFTWARE TEST SYSTEM Jun 6, 1994 Abandoned
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