Rhonda S. Peace

Array ( [id] => 17462841 [patent_doc_number] => 20220076147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => PROCESS TREE DISCOVERY USING A PROBABILISTIC INDUCTIVE MINER [patent_app_type] => utility [patent_app_number] => 17/161729 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161729 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16849010 [patent_doc_number] => 20210149755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => READ WINDOW SIZE [patent_app_type] => utility [patent_app_number] => 17/248538 [patent_app_country] => US [patent_app_date] => 2021-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9814 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17248538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16810510 [patent_doc_number] => 20210133065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => PROCESSOR WITH DEBUG PIPELINE [patent_app_type] => utility [patent_app_number] => 17/146584 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146584 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17722230 [patent_doc_number] => 20220214952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SYSTEMS AND METHODS FOR AUTOMATED INJECTION OF EFFECTS IN CYBER-PHYSICAL SYSTEMS AND THEIR SIMULATIONS [patent_app_type] => utility [patent_app_number] => 17/141671 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -39 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17141671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16794839 [patent_doc_number] => 20210124656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => METHODS AND APPARATUS FOR DETECTING, ELIMINATING AND/OR MITIGATING SPLIT BRAIN OCCURRENCES IN HIGH AVAILABILITY SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/140737 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17417 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140737 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17690475 [patent_doc_number] => 20220197768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => HARDWARE ASSISTED MEMORY PROFILING AGGREGATOR [patent_app_type] => utility [patent_app_number] => 17/130665 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19341283 [patent_doc_number] => 12051478 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Test devices having parallel impedances to reduce measurement input impedance and related apparatuses, systems, and methods [patent_app_type] => utility [patent_app_number] => 17/131383 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7712 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17131383 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16918747 [patent_doc_number] => 20210191839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD [patent_app_type] => utility [patent_app_number] => 17/123418 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18527734 [patent_doc_number] => 11714726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Failover and recovery for replicated data instances [patent_app_type] => utility [patent_app_number] => 17/112731 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 21546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18030741 [patent_doc_number] => 11513930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Log-based status modeling and problem diagnosis for distributed applications [patent_app_type] => utility [patent_app_number] => 17/110513 [patent_app_country] => US [patent_app_date] => 2020-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10903 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17110513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18154869 [patent_doc_number] => 11567848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Data transmission [patent_app_type] => utility [patent_app_number] => 17/106324 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7976 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18111591 [patent_doc_number] => 20230004471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => IDENTIFYING CAUSES OF ANOMALIES OBSERVED IN AN INTEGRATED CIRCUIT CHIP [patent_app_type] => utility [patent_app_number] => 17/780837 [patent_app_country] => US [patent_app_date] => 2020-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17780837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17394820 [patent_doc_number] => 11243834 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-08 [patent_title] => Log parsing template generation [patent_app_type] => utility [patent_app_number] => 17/099468 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6353 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099468 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16630431 [patent_doc_number] => 20210049084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => APPLICATION PROCESSOR, AUTOMOTIVE ELECTRONIC PROCESSOR, AND COMPUTING DEVICE INCLUDING APPLICATION PROCESSOR [patent_app_type] => utility [patent_app_number] => 17/087666 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087666 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18130344 [patent_doc_number] => 11556555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Automatic data-screening framework and preprocessing pipeline to support ML-based prognostic surveillance [patent_app_type] => utility [patent_app_number] => 17/081859 [patent_app_country] => US [patent_app_date] => 2020-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5375 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18046721 [patent_doc_number] => 11520675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Accelerated replay of computer system configuration sequences [patent_app_type] => utility [patent_app_number] => 17/078885 [patent_app_country] => US [patent_app_date] => 2020-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17078885 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17387842 [patent_doc_number] => 20220035694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => SYSTEM AND METHOD FOR CONSTRUCTING FAULT-AUGMENTED SYSTEM MODEL FOR ROOT CAUSE ANALYSIS OF FAULTS IN MANUFACTURING SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/068613 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068613 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17535459 [patent_doc_number] => 20220114068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => MERGED INFRASTRUCTURE FOR MANUFACTURING AND LIFECYCLE MANAGEMENT OF BOTH HARDWARE AND SOFTWARE [patent_app_type] => utility [patent_app_number] => 17/067274 [patent_app_country] => US [patent_app_date] => 2020-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8390 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067274 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16714147 [patent_doc_number] => 20210081294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => PROCESSING SCREENSHOTS OF AN APPLICATION USER INTERFACE TO DETECT ERRORS [patent_app_type] => utility [patent_app_number] => 17/017395 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017395 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17999649 [patent_doc_number] => 11500756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Process tree discovery using a probabilistic inductive miner [patent_app_type] => utility [patent_app_number] => 17/013624 [patent_app_country] => US [patent_app_date] => 2020-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7654 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013624 [rel_patent_id] =>[rel_patent_doc_number] =>)