
Richard A. Booth
Examiner (ID: 15550, Phone: (571)272-1668 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812, 1107 |
| Total Applications | 3318 |
| Issued Applications | 2851 |
| Pending Applications | 159 |
| Abandoned Applications | 345 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19454954
[patent_doc_number] => 20240315084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD FOR FABRICATING DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/575971
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 55109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18575971
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/575971 | DISPLAY APPARATUS, DISPLAY MODULE, ELECTRONIC DEVICE, AND METHOD FOR FABRICATING DISPLAY APPARATUS | Jun 29, 2022 | Pending |
Array
(
[id] => 19357013
[patent_doc_number] => 12057470
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-06
[patent_title] => Semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/809727
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 8780
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809727
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809727 | Semiconductor devices | Jun 28, 2022 | Issued |
Array
(
[id] => 17933490
[patent_doc_number] => 20220328616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => CAPACITOR INCLUDING PEROVSKITE MATERIAL, SEMICONDUCTOR DEVICE INCLUDING THE CAPACITOR, AND METHOD OF MANUFACTURING THE CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 17/853290
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8055
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853290
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853290 | Capacitor including perovskite material, semiconductor device including the capacitor, and method of manufacturing the capacitor | Jun 28, 2022 | Issued |
Array
(
[id] => 17933243
[patent_doc_number] => 20220328369
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => PRESSURE SENSORS ON FLEXIBLE SUBSTRATES FOR STRESS DECOUPLING
[patent_app_type] => utility
[patent_app_number] => 17/851284
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5934
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -28
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851284
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851284 | Pressure sensors on flexible substrates for stress decoupling | Jun 27, 2022 | Issued |
Array
(
[id] => 17933489
[patent_doc_number] => 20220328615
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => CAPACITOR INCLUDING PEROVSKITE MATERIAL, SEMICONDUCTOR DEVICE INCLUDING THE CAPACITOR, AND METHOD OF MANUFACTURING THE CAPACITOR
[patent_app_type] => utility
[patent_app_number] => 17/851836
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8054
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851836
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851836 | Capacitor including perovskite material, semiconductor device including the capacitor, and method of manufacturing the capacitor | Jun 27, 2022 | Issued |
Array
(
[id] => 18113151
[patent_doc_number] => 20230006031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-05
[patent_title] => METHOD OF MANUFACTURING METAL-INSULATOR-METAL (MIM) CAPACITORS WITH NOBLE METAL ELECTRODE LINERS
[patent_app_type] => utility
[patent_app_number] => 17/850087
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7314
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850087
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/850087 | Method of manufacturing metal-insulator-metal (MIM) capacitors with noble metal electrode liners | Jun 26, 2022 | Issued |
Array
(
[id] => 18226141
[patent_doc_number] => 20230065135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => DISPLAY APPARATUS AND ELECTRONIC DEVICE HAVING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/847133
[patent_app_country] => US
[patent_app_date] => 2022-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22371
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847133
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/847133 | Display apparatus and electronic device having the same | Jun 21, 2022 | Issued |
Array
(
[id] => 19509422
[patent_doc_number] => 12120863
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-15
[patent_title] => Semiconductor structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/845113
[patent_app_country] => US
[patent_app_date] => 2022-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7095
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845113
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/845113 | Semiconductor structure and manufacturing method thereof | Jun 20, 2022 | Issued |
Array
(
[id] => 19378270
[patent_doc_number] => 12069867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-20
[patent_title] => Ferroelectric random access memory device with seed layer
[patent_app_type] => utility
[patent_app_number] => 17/843236
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 52
[patent_no_of_words] => 13012
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843236
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843236 | Ferroelectric random access memory device with seed layer | Jun 16, 2022 | Issued |
Array
(
[id] => 19393013
[patent_doc_number] => 20240282883
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => METHOD FOR MANUFACTUING NON-EMITTING III-NITRIDE SEMICONDUCTOR STACKED STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/570666
[patent_app_country] => US
[patent_app_date] => 2022-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27686
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18570666
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/570666 | METHOD FOR MANUFACTUING NON-EMITTING III-NITRIDE SEMICONDUCTOR STACKED STRUCTURE | Jun 14, 2022 | Pending |
Array
(
[id] => 18416158
[patent_doc_number] => 11670707
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-06
[patent_title] => Integrated assemblies and methods of forming integrated assemblies
[patent_app_type] => utility
[patent_app_number] => 17/840250
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 6216
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840250
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/840250 | Integrated assemblies and methods of forming integrated assemblies | Jun 13, 2022 | Issued |
Array
(
[id] => 17901119
[patent_doc_number] => 20220310781
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => CAPACITOR STRUCTURES FOR MEMORY AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/838285
[patent_app_country] => US
[patent_app_date] => 2022-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5128
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838285
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/838285 | Capacitor structures for memory and method of manufacturing the same | Jun 12, 2022 | Issued |
Array
(
[id] => 17886795
[patent_doc_number] => 20220302273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/837641
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837641
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/837641 | Memory device | Jun 9, 2022 | Issued |
Array
(
[id] => 20375279
[patent_doc_number] => 12482723
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Backside metallization of flip-chip semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/837396
[patent_app_country] => US
[patent_app_date] => 2022-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837396
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/837396 | Backside metallization of flip-chip semiconductor devices | Jun 9, 2022 | Issued |
Array
(
[id] => 20496579
[patent_doc_number] => 12538468
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-27
[patent_title] => Method of fabricating semiconductor device with programmble feature
[patent_app_type] => utility
[patent_app_number] => 17/825480
[patent_app_country] => US
[patent_app_date] => 2022-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 1113
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825480
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/825480 | Method of fabricating semiconductor device with programmble feature | May 25, 2022 | Issued |
Array
(
[id] => 18814929
[patent_doc_number] => 20230389267
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => METHOD OF FABRICATING STORAGE CAPACITOR WITH MULTIPLE DIELECTRICS
[patent_app_type] => utility
[patent_app_number] => 17/752638
[patent_app_country] => US
[patent_app_date] => 2022-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6288
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752638
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/752638 | METHOD OF FABRICATING STORAGE CAPACITOR WITH MULTIPLE DIELECTRICS | May 23, 2022 | Abandoned |
Array
(
[id] => 18402276
[patent_doc_number] => 11664427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-30
[patent_title] => Vertical semiconductor device with enhanced contact structure and associated methods
[patent_app_type] => utility
[patent_app_number] => 17/750683
[patent_app_country] => US
[patent_app_date] => 2022-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 5203
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750683
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/750683 | Vertical semiconductor device with enhanced contact structure and associated methods | May 22, 2022 | Issued |
Array
(
[id] => 18006258
[patent_doc_number] => 20220365024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => INTEGRATED CIRCUIT WITH 2D FETS FOR DIRECT AND INDIRECT TARGET SIGNAL MEASUREMENT
[patent_app_type] => utility
[patent_app_number] => 17/749993
[patent_app_country] => US
[patent_app_date] => 2022-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33683
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17749993
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/749993 | Integrated circuit with 2D FETs for direct and indirect target signal measurement | May 19, 2022 | Issued |
Array
(
[id] => 19900302
[patent_doc_number] => 12278240
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-15
[patent_title] => IC logic device, layout, system, and method
[patent_app_type] => utility
[patent_app_number] => 17/750168
[patent_app_country] => US
[patent_app_date] => 2022-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 35
[patent_no_of_words] => 14547
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750168
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/750168 | IC logic device, layout, system, and method | May 19, 2022 | Issued |
Array
(
[id] => 19952761
[patent_doc_number] => 12324146
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Vertical DRAM structure and method of formation
[patent_app_type] => utility
[patent_app_number] => 17/747389
[patent_app_country] => US
[patent_app_date] => 2022-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 66
[patent_figures_cnt] => 84
[patent_no_of_words] => 6311
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747389
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/747389 | Vertical DRAM structure and method of formation | May 17, 2022 | Issued |