Search

Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10098642 [patent_doc_number] => 09134953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Microprocessor Shifter Circuits Utilizing Butterfly and Inverse Butterfly Routing Circuits, and Control Circuits Therefor' [patent_app_type] => utility [patent_app_number] => 13/647861 [patent_app_country] => US [patent_app_date] => 2012-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 55 [patent_no_of_words] => 21547 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13647861 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/647861
Microprocessor Shifter Circuits Utilizing Butterfly and Inverse Butterfly Routing Circuits, and Control Circuits Therefor Oct 8, 2012 Issued
Array ( [id] => 11188371 [patent_doc_number] => 09419793 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Method for generating large prime number in embedded system' [patent_app_type] => utility [patent_app_number] => 14/237363 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4933 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14237363 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/237363
Method for generating large prime number in embedded system Sep 24, 2012 Issued
Array ( [id] => 9885687 [patent_doc_number] => 08972471 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Arithmetic module, device and system' [patent_app_type] => utility [patent_app_number] => 13/611146 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2239 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13611146 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/611146
Arithmetic module, device and system Sep 11, 2012 Issued
Array ( [id] => 8588258 [patent_doc_number] => 20130007079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'LU FACTORIZATION OF LOW RANK BLOCKED MATRICES WITH SIGNIFICANTLY REDUCED OPERATIONS COUNT AND MEMORY REQUIREMENTS' [patent_app_type] => utility [patent_app_number] => 13/611353 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14046 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13611353 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/611353
LU FACTORIZATION OF LOW RANK BLOCKED MATRICES WITH SIGNIFICANTLY REDUCED OPERATIONS COUNT AND MEMORY REQUIREMENTS Sep 11, 2012 Abandoned
Array ( [id] => 9365029 [patent_doc_number] => 20140074902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-13 [patent_title] => 'NUMBER REPRESENTATION AND MEMORY SYSTEM FOR ARITHMETIC' [patent_app_type] => utility [patent_app_number] => 13/606998 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5668 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606998 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/606998
Number representation and memory system for arithmetic Sep 6, 2012 Issued
Array ( [id] => 10072387 [patent_doc_number] => 09110746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Magnetic tunnel junction based random number generator' [patent_app_type] => utility [patent_app_number] => 13/602776 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4212 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602776 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602776
Magnetic tunnel junction based random number generator Sep 3, 2012 Issued
Array ( [id] => 9341452 [patent_doc_number] => 20140068236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'CUSTOM CONFIGURATION FOR A CALCULATOR BASED ON A SELECTED FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 13/601835 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5213 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13601835 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/601835
Custom configuration for a calculator based on a selected functionality Aug 30, 2012 Issued
Array ( [id] => 9341111 [patent_doc_number] => 20140067895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'MICROARCHITECTURE FOR FLOATING POINT FUSED MULTIPLY-ADD WITH EXPONENT SCALING' [patent_app_type] => utility [patent_app_number] => 13/598760 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8874 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13598760 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/598760
Microarchitecture for floating point fused multiply-add with exponent scaling Aug 29, 2012 Issued
Array ( [id] => 8524573 [patent_doc_number] => 20120323982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'METHOD AND STRUCTURE FOR PROVABLY FAIR RANDOM NUMBER GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/594253 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3727 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/594253
Method and structure for provably fair random number generator Aug 23, 2012 Issued
Array ( [id] => 10159198 [patent_doc_number] => 09190983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Digital filter' [patent_app_type] => utility [patent_app_number] => 13/591516 [patent_app_country] => US [patent_app_date] => 2012-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9896 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591516 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/591516
Digital filter Aug 21, 2012 Issued
Array ( [id] => 11931698 [patent_doc_number] => 09798698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'System and method for multi-color dilu preconditioner' [patent_app_type] => utility [patent_app_number] => 13/584575 [patent_app_country] => US [patent_app_date] => 2012-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7557 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13584575 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/584575
System and method for multi-color dilu preconditioner Aug 12, 2012 Issued
Array ( [id] => 9308315 [patent_doc_number] => 20140046989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'SYSTEMS AND METHODS FOR DUAL NUMBER BASE CALCULATORS' [patent_app_type] => utility [patent_app_number] => 13/572548 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6827 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572548 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/572548
SYSTEMS AND METHODS FOR DUAL NUMBER BASE CALCULATORS Aug 9, 2012 Abandoned
Array ( [id] => 9992402 [patent_doc_number] => 09037624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-19 [patent_title] => 'Using memory access times for random number generation' [patent_app_type] => utility [patent_app_number] => 13/566648 [patent_app_country] => US [patent_app_date] => 2012-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4432 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13566648 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/566648
Using memory access times for random number generation Aug 2, 2012 Issued
Array ( [id] => 9947275 [patent_doc_number] => 08996600 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-31 [patent_title] => 'Specialized processing block for implementing floating-point multiplier with subnormal operation support' [patent_app_type] => utility [patent_app_number] => 13/566256 [patent_app_country] => US [patent_app_date] => 2012-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4086 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13566256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/566256
Specialized processing block for implementing floating-point multiplier with subnormal operation support Aug 2, 2012 Issued
Array ( [id] => 10009455 [patent_doc_number] => 09052975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Random number generator with ring oscillation circuit' [patent_app_type] => utility [patent_app_number] => 13/565591 [patent_app_country] => US [patent_app_date] => 2012-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 10045 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13565591 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/565591
Random number generator with ring oscillation circuit Aug 1, 2012 Issued
Array ( [id] => 9296701 [patent_doc_number] => 20140040335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'METHOD OF ENTROPY DISTRIBUTION ON A PARALLEL COMPUTER' [patent_app_type] => utility [patent_app_number] => 13/562486 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6383 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562486 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562486
Method of entropy distribution on a parallel computer Jul 30, 2012 Issued
Array ( [id] => 8639351 [patent_doc_number] => 20130031154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'SELF-TIMED MULTIPLIER' [patent_app_type] => utility [patent_app_number] => 13/559832 [patent_app_country] => US [patent_app_date] => 2012-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7841 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13559832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/559832
Independently timed multiplier Jul 26, 2012 Issued
Array ( [id] => 9973969 [patent_doc_number] => 09021004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-28 [patent_title] => 'Execution unit with inline pseudorandom number generator' [patent_app_type] => utility [patent_app_number] => 13/556464 [patent_app_country] => US [patent_app_date] => 2012-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11133 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13556464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/556464
Execution unit with inline pseudorandom number generator Jul 23, 2012 Issued
Array ( [id] => 9571253 [patent_doc_number] => 20140188966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'Floating-point multiply-add unit using cascade design' [patent_app_type] => utility [patent_app_number] => 13/556710 [patent_app_country] => US [patent_app_date] => 2012-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3967 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13556710 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/556710
Floating-point multiply-add unit using cascade design Jul 23, 2012 Issued
Array ( [id] => 9967589 [patent_doc_number] => 09015220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Correlation device' [patent_app_type] => utility [patent_app_number] => 13/551144 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 7532 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551144 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551144
Correlation device Jul 16, 2012 Issued
Menu