Search

Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5493743 [patent_doc_number] => 20090261771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-22 [patent_title] => 'INTERPOLATOR FOR A NETWORKED MOTION CONTROL SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/105942 [patent_app_country] => US [patent_app_date] => 2008-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6361 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0261/20090261771.pdf [firstpage_image] =>[orig_patent_app_number] => 12105942 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/105942
Interpolator for a networked motion control system Apr 17, 2008 Issued
Array ( [id] => 4780756 [patent_doc_number] => 20080288755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'CLOCK DRIVEN DYNAMIC DATAPATH CHAINING' [patent_app_type] => utility [patent_app_number] => 12/104391 [patent_app_country] => US [patent_app_date] => 2008-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4906 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20080288755.pdf [firstpage_image] =>[orig_patent_app_number] => 12104391 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/104391
Clock driven dynamic datapath chaining Apr 15, 2008 Issued
Array ( [id] => 8235273 [patent_doc_number] => 08200733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-06-12 [patent_title] => 'Device having interleaving capabilities and a method for applying an interleaving function' [patent_app_type] => utility [patent_app_number] => 12/102996 [patent_app_country] => US [patent_app_date] => 2008-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/200/08200733.pdf [firstpage_image] =>[orig_patent_app_number] => 12102996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/102996
Device having interleaving capabilities and a method for applying an interleaving function Apr 14, 2008 Issued
Array ( [id] => 8535908 [patent_doc_number] => 08312071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Method and structure for provably fair random number generator' [patent_app_type] => utility [patent_app_number] => 12/101734 [patent_app_country] => US [patent_app_date] => 2008-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3685 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12101734 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/101734
Method and structure for provably fair random number generator Apr 10, 2008 Issued
Array ( [id] => 5459670 [patent_doc_number] => 20090259822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-15 [patent_title] => 'STREAMING DIGITAL DATA FILTER' [patent_app_type] => utility [patent_app_number] => 12/100448 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4021 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0259/20090259822.pdf [firstpage_image] =>[orig_patent_app_number] => 12100448 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100448
Streaming digital data filter Apr 9, 2008 Issued
Array ( [id] => 7529795 [patent_doc_number] => 08046400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Apparatus and method for optimizing the performance of x87 floating point addition instructions in a microprocessor' [patent_app_type] => utility [patent_app_number] => 12/100583 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 10731 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/046/08046400.pdf [firstpage_image] =>[orig_patent_app_number] => 12100583 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100583
Apparatus and method for optimizing the performance of x87 floating point addition instructions in a microprocessor Apr 9, 2008 Issued
Array ( [id] => 7537478 [patent_doc_number] => 08051120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-01 [patent_title] => 'Circuit and design structure for a streaming digital data filter' [patent_app_type] => utility [patent_app_number] => 12/100462 [patent_app_country] => US [patent_app_date] => 2008-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3723 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/051/08051120.pdf [firstpage_image] =>[orig_patent_app_number] => 12100462 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100462
Circuit and design structure for a streaming digital data filter Apr 9, 2008 Issued
Array ( [id] => 7510020 [patent_doc_number] => 08037118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Three-path fused multiply-adder circuit' [patent_app_type] => utility [patent_app_number] => 12/082127 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2359 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/037/08037118.pdf [firstpage_image] =>[orig_patent_app_number] => 12082127 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/082127
Three-path fused multiply-adder circuit Apr 8, 2008 Issued
Array ( [id] => 8342847 [patent_doc_number] => 08244784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Generating a number based on mask and range constraints' [patent_app_type] => utility [patent_app_number] => 12/099793 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9772 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12099793 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099793
Generating a number based on mask and range constraints Apr 8, 2008 Issued
Array ( [id] => 5332481 [patent_doc_number] => 20090112958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'Processes and apparatus for deriving order-16 integer transforms' [patent_app_type] => utility [patent_app_number] => 12/100358 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6093 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20090112958.pdf [firstpage_image] =>[orig_patent_app_number] => 12100358 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100358
Processes and apparatus for deriving order-16 integer transforms Apr 8, 2008 Issued
Array ( [id] => 4665254 [patent_doc_number] => 20080256161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-16 [patent_title] => 'Bridge Fused Multiply-Adder Circuit' [patent_app_type] => utility [patent_app_number] => 12/100202 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2405 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20080256161.pdf [firstpage_image] =>[orig_patent_app_number] => 12100202 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/100202
Bridge fused multiply-adder circuit Apr 8, 2008 Issued
Array ( [id] => 8219643 [patent_doc_number] => 08195728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Handling mask and range constraints' [patent_app_type] => utility [patent_app_number] => 12/099795 [patent_app_country] => US [patent_app_date] => 2008-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7473 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/195/08195728.pdf [firstpage_image] =>[orig_patent_app_number] => 12099795 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/099795
Handling mask and range constraints Apr 8, 2008 Issued
Array ( [id] => 4888786 [patent_doc_number] => 20080263118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'System for convolution calculation with multiple computer processors' [patent_app_type] => utility [patent_app_number] => 12/080821 [patent_app_country] => US [patent_app_date] => 2008-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8188 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20080263118.pdf [firstpage_image] =>[orig_patent_app_number] => 12080821 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/080821
System for convolution calculation with multiple computer processors Apr 3, 2008 Abandoned
Array ( [id] => 5528674 [patent_doc_number] => 20090198751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'METHOD AND APPARATUS FOR CONTROLLING FUNCTIONALITIES OF COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/061655 [patent_app_country] => US [patent_app_date] => 2008-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3296 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20090198751.pdf [firstpage_image] =>[orig_patent_app_number] => 12061655 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/061655
METHOD AND APPARATUS FOR CONTROLLING FUNCTIONALITIES OF COMPUTER SYSTEM Apr 2, 2008 Abandoned
Array ( [id] => 8715923 [patent_doc_number] => 08402074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Adaptive filter device and method for determining filter coefficients' [patent_app_type] => utility [patent_app_number] => 12/078386 [patent_app_country] => US [patent_app_date] => 2008-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3794 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12078386 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/078386
Adaptive filter device and method for determining filter coefficients Mar 30, 2008 Issued
Array ( [id] => 4721811 [patent_doc_number] => 20080243976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'MULTIPLY AND MULTIPLY AND ACCUMULATE UNIT' [patent_app_type] => utility [patent_app_number] => 12/057625 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6367 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20080243976.pdf [firstpage_image] =>[orig_patent_app_number] => 12057625 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/057625
MULTIPLY AND MULTIPLY AND ACCUMULATE UNIT Mar 27, 2008 Abandoned
Array ( [id] => 7803505 [patent_doc_number] => 08131789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'True random number generator' [patent_app_type] => utility [patent_app_number] => 12/058309 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 5422 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/131/08131789.pdf [firstpage_image] =>[orig_patent_app_number] => 12058309 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/058309
True random number generator Mar 27, 2008 Issued
Array ( [id] => 5475615 [patent_doc_number] => 20090248781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-01 [patent_title] => 'METHOD AND DEVICE FOR DYNAMICALLY VERIFYING A PROCESSOR ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/057623 [patent_app_country] => US [patent_app_date] => 2008-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5363 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20090248781.pdf [firstpage_image] =>[orig_patent_app_number] => 12057623 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/057623
Method and device for dynamically verifying a processor architecture Mar 27, 2008 Issued
Array ( [id] => 8997890 [patent_doc_number] => 08521795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Random number generating device' [patent_app_type] => utility [patent_app_number] => 12/452012 [patent_app_country] => US [patent_app_date] => 2008-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9368 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12452012 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/452012
Random number generating device Mar 23, 2008 Issued
Array ( [id] => 5528679 [patent_doc_number] => 20090198756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-06 [patent_title] => 'REPRESENTATION OF DATA TRANSFORMATION PROCESSES FOR PARALLELIZATION' [patent_app_type] => utility [patent_app_number] => 12/026943 [patent_app_country] => US [patent_app_date] => 2008-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5077 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20090198756.pdf [firstpage_image] =>[orig_patent_app_number] => 12026943 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/026943
Representation of data transformation processes for parallelization Feb 5, 2008 Issued
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