Richard L Schilling
Examiner (ID: 9849)
Most Active Art Unit | 1506 |
Art Unit(s) | 1506, 1752, 1302, 1795, 1715, 1113 |
Total Applications | 3259 |
Issued Applications | 2786 |
Pending Applications | 25 |
Abandoned Applications | 448 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 4940326
[patent_doc_number] => 20080077645
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-27
[patent_title] => 'SYSTEM AND METHOD FOR EFFICIENT BASIS CONVERSION'
[patent_app_type] => utility
[patent_app_number] => 11/867594
[patent_app_country] => US
[patent_app_date] => 2007-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2704
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0077/20080077645.pdf
[firstpage_image] =>[orig_patent_app_number] => 11867594
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/867594 | System and method for efficient basis conversion | Oct 3, 2007 | Issued |
Array
(
[id] => 4659151
[patent_doc_number] => 20080028013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'TWO-DIMENSIONAL FAST FOURIER TRANSFORM CALCULATION METHOD AND APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 11/865792
[patent_app_country] => US
[patent_app_date] => 2007-10-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 6202
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0028/20080028013.pdf
[firstpage_image] =>[orig_patent_app_number] => 11865792
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/865792 | TWO-DIMENSIONAL FAST FOURIER TRANSFORM CALCULATION METHOD AND APPARATUS | Oct 1, 2007 | Abandoned |
Array
(
[id] => 4741662
[patent_doc_number] => 20080235315
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'TECHNIQUE FOR SOLVING NP-HARD PROBLEMS USING POLYNOMIAL SEQUENTIAL TIME AND POLYLOGARITHMIC PARALLEL TIME'
[patent_app_type] => utility
[patent_app_number] => 11/865075
[patent_app_country] => US
[patent_app_date] => 2007-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9873
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20080235315.pdf
[firstpage_image] =>[orig_patent_app_number] => 11865075
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/865075 | TECHNIQUE FOR SOLVING NP-HARD PROBLEMS USING POLYNOMIAL SEQUENTIAL TIME AND POLYLOGARITHMIC PARALLEL TIME | Sep 30, 2007 | Abandoned |
Array
(
[id] => 4479396
[patent_doc_number] => RE042134
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2011-02-08
[patent_title] => 'Process for generating a serial number from random numbers'
[patent_app_type] => reissue
[patent_app_number] => 11/865705
[patent_app_country] => US
[patent_app_date] => 2007-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1341
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/042/RE042134.pdf
[firstpage_image] =>[orig_patent_app_number] => 11865705
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/865705 | Process for generating a serial number from random numbers | Sep 30, 2007 | Issued |
Array
(
[id] => 8799322
[patent_doc_number] => 08438207
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-05-07
[patent_title] => 'Adaptive precision arithmetic unit for error tolerant applications'
[patent_app_type] => utility
[patent_app_number] => 11/864580
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 7645
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11864580
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/864580 | Adaptive precision arithmetic unit for error tolerant applications | Sep 27, 2007 | Issued |
Array
(
[id] => 4881621
[patent_doc_number] => 20080155004
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-26
[patent_title] => 'ARITHMETIC CIRCUIT, ARITHMETIC METHOD, AND INFORMATION PROCESSING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/864084
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 7858
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20080155004.pdf
[firstpage_image] =>[orig_patent_app_number] => 11864084
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/864084 | Arithmetic circuit, arithmetic method, and information processing device | Sep 27, 2007 | Issued |
Array
(
[id] => 7734250
[patent_doc_number] => 08103712
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-24
[patent_title] => 'Method for performing a division operation in a system'
[patent_app_type] => utility
[patent_app_number] => 11/863711
[patent_app_country] => US
[patent_app_date] => 2007-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5013
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/103/08103712.pdf
[firstpage_image] =>[orig_patent_app_number] => 11863711
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/863711 | Method for performing a division operation in a system | Sep 27, 2007 | Issued |
Array
(
[id] => 4616367
[patent_doc_number] => 07991819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-02
[patent_title] => 'Binary coded decimal addition'
[patent_app_type] => utility
[patent_app_number] => 11/861748
[patent_app_country] => US
[patent_app_date] => 2007-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4635
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/991/07991819.pdf
[firstpage_image] =>[orig_patent_app_number] => 11861748
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/861748 | Binary coded decimal addition | Sep 25, 2007 | Issued |
Array
(
[id] => 7494939
[patent_doc_number] => 08032576
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-10-04
[patent_title] => 'Fast fourier transform circuit and fast fourier transform method'
[patent_app_type] => utility
[patent_app_number] => 11/859863
[patent_app_country] => US
[patent_app_date] => 2007-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 24
[patent_no_of_words] => 7301
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/032/08032576.pdf
[firstpage_image] =>[orig_patent_app_number] => 11859863
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/859863 | Fast fourier transform circuit and fast fourier transform method | Sep 23, 2007 | Issued |
Array
(
[id] => 5510145
[patent_doc_number] => 20090083352
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-26
[patent_title] => 'METHODS AND APPARATUS FOR PERFORMING REDUCED COMPLEXITY DISCRETE FOURIER TRANSFORMS USING INTERPOLATION'
[patent_app_type] => utility
[patent_app_number] => 11/859437
[patent_app_country] => US
[patent_app_date] => 2007-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0083/20090083352.pdf
[firstpage_image] =>[orig_patent_app_number] => 11859437
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/859437 | Methods and apparatus for performing reduced complexity discrete fourier transforms using interpolation | Sep 20, 2007 | Issued |
Array
(
[id] => 8010481
[patent_doc_number] => 08086655
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Methods and apparatus for perturbing an evolving data stream for time series compressibility and privacy'
[patent_app_type] => utility
[patent_app_number] => 11/855378
[patent_app_country] => US
[patent_app_date] => 2007-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 17
[patent_no_of_words] => 10696
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/086/08086655.pdf
[firstpage_image] =>[orig_patent_app_number] => 11855378
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/855378 | Methods and apparatus for perturbing an evolving data stream for time series compressibility and privacy | Sep 13, 2007 | Issued |
Array
(
[id] => 4905411
[patent_doc_number] => 20080114825
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-15
[patent_title] => 'DIGITAL SIGNAL PROCESSING APPARATUS AND DIGITAL SIGNAL PROCESSING METHOD'
[patent_app_type] => utility
[patent_app_number] => 11/852877
[patent_app_country] => US
[patent_app_date] => 2007-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 10266
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0114/20080114825.pdf
[firstpage_image] =>[orig_patent_app_number] => 11852877
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/852877 | Digital signal processing apparatus and digital signal processing method | Sep 9, 2007 | Issued |
Array
(
[id] => 4895057
[patent_doc_number] => 20080104156
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'RANDOM NUMBER GENERATORS AND SYSTEMS AND METHODS RELATING TO THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/851697
[patent_app_country] => US
[patent_app_date] => 2007-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6577
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20080104156.pdf
[firstpage_image] =>[orig_patent_app_number] => 11851697
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/851697 | Random number generators and systems and methods relating to the same | Sep 6, 2007 | Issued |
Array
(
[id] => 4509867
[patent_doc_number] => 07949699
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-05-24
[patent_title] => 'Implementation of decimation filter in integrated circuit device using ram-based data storage'
[patent_app_type] => utility
[patent_app_number] => 11/848020
[patent_app_country] => US
[patent_app_date] => 2007-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 3970
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/949/07949699.pdf
[firstpage_image] =>[orig_patent_app_number] => 11848020
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/848020 | Implementation of decimation filter in integrated circuit device using ram-based data storage | Aug 29, 2007 | Issued |
Array
(
[id] => 4895062
[patent_doc_number] => 20080104161
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-01
[patent_title] => 'Integrated conversion method and apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/845003
[patent_app_country] => US
[patent_app_date] => 2007-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3051
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20080104161.pdf
[firstpage_image] =>[orig_patent_app_number] => 11845003
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/845003 | Integrated conversion method and apparatus | Aug 23, 2007 | Issued |
Array
(
[id] => 4646775
[patent_doc_number] => 08024387
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-20
[patent_title] => 'Method for synthesizing linear finite state machines'
[patent_app_type] => utility
[patent_app_number] => 11/894393
[patent_app_country] => US
[patent_app_date] => 2007-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 31
[patent_no_of_words] => 5134
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/024/08024387.pdf
[firstpage_image] =>[orig_patent_app_number] => 11894393
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/894393 | Method for synthesizing linear finite state machines | Aug 19, 2007 | Issued |
Array
(
[id] => 5417949
[patent_doc_number] => 20090043836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-12
[patent_title] => 'METHOD AND SYSTEM FOR LARGE NUMBER MULTIPLICATION'
[patent_app_type] => utility
[patent_app_number] => 11/837387
[patent_app_country] => US
[patent_app_date] => 2007-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6865
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20090043836.pdf
[firstpage_image] =>[orig_patent_app_number] => 11837387
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/837387 | Method and system for large number multiplication | Aug 9, 2007 | Issued |
Array
(
[id] => 4613768
[patent_doc_number] => 07996453
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-08-09
[patent_title] => 'Methods and apparatus for providing an efficient FFT memory addressing and storage scheme'
[patent_app_type] => utility
[patent_app_number] => 11/835214
[patent_app_country] => US
[patent_app_date] => 2007-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 8134
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/996/07996453.pdf
[firstpage_image] =>[orig_patent_app_number] => 11835214
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/835214 | Methods and apparatus for providing an efficient FFT memory addressing and storage scheme | Aug 6, 2007 | Issued |
Array
(
[id] => 5086841
[patent_doc_number] => 20070276892
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-29
[patent_title] => 'FINITE IMPULSE RESPONSE FILTER AND DIGITAL SIGNAL RECEIVING APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 11/833030
[patent_app_country] => US
[patent_app_date] => 2007-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 8447
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0276/20070276892.pdf
[firstpage_image] =>[orig_patent_app_number] => 11833030
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/833030 | Finite impulse response filter and digital signal receiving apparatus | Aug 1, 2007 | Issued |
Array
(
[id] => 4521334
[patent_doc_number] => 07917568
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'X87 fused multiply-add instruction'
[patent_app_type] => utility
[patent_app_number] => 11/781754
[patent_app_country] => US
[patent_app_date] => 2007-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3947
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/917/07917568.pdf
[firstpage_image] =>[orig_patent_app_number] => 11781754
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/781754 | X87 fused multiply-add instruction | Jul 22, 2007 | Issued |