Search

Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12027967 [patent_doc_number] => 20170318066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'SYSTEM AND METHOD FOR LONG RANGE AND SHORT RANGE DATA COMPRESSION' [patent_app_type] => utility [patent_app_number] => 15/655288 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13914 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655288 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655288
System and method for long range and short range data compression Jul 19, 2017 Issued
Array ( [id] => 12026131 [patent_doc_number] => 20170316230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'EXTENDED USE OF LOGARITHM AND EXPONENT INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 15/651296 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6509 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15651296 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/651296
EXTENDED USE OF LOGARITHM AND EXPONENT INSTRUCTIONS Jul 16, 2017 Abandoned
Array ( [id] => 13860003 [patent_doc_number] => 10191720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Circuitry and methods for implementing Galois-field reduction [patent_app_type] => utility [patent_app_number] => 15/650987 [patent_app_country] => US [patent_app_date] => 2017-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 7849 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15650987 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/650987
Circuitry and methods for implementing Galois-field reduction Jul 16, 2017 Issued
Array ( [id] => 13830337 [patent_doc_number] => 20190018653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-17 [patent_title] => MULTIPLY-ADD OPERATIONS OF BINARY NUMBERS IN AN ARITHMETIC UNIT [patent_app_type] => utility [patent_app_number] => 15/649406 [patent_app_country] => US [patent_app_date] => 2017-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15649406 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/649406
Multiply-add operations of binary numbers in an arithmetic unit Jul 12, 2017 Issued
Array ( [id] => 14887685 [patent_doc_number] => 10423887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Compilation, memory management, and fault localization with ancillas in an unknown state [patent_app_type] => utility [patent_app_number] => 15/640108 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 12119 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640108 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640108
Compilation, memory management, and fault localization with ancillas in an unknown state Jun 29, 2017 Issued
Array ( [id] => 13782511 [patent_doc_number] => 20190004794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-03 [patent_title] => MATRIX MULTIPLICATION AT MEMORY BANDWIDTH [patent_app_type] => utility [patent_app_number] => 15/638168 [patent_app_country] => US [patent_app_date] => 2017-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15638168 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/638168
Matrix multiplication at memory bandwidth Jun 28, 2017 Issued
Array ( [id] => 11996142 [patent_doc_number] => 20170300297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'Partially and Fully Parallel Normaliser' [patent_app_type] => utility [patent_app_number] => 15/636100 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6894 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636100 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636100
Partially and fully parallel normaliser Jun 27, 2017 Issued
Array ( [id] => 11973360 [patent_doc_number] => 20170277514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'Unified Multiply Unit' [patent_app_type] => utility [patent_app_number] => 15/621388 [patent_app_country] => US [patent_app_date] => 2017-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 22308 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15621388 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/621388
Unified multiply unit Jun 12, 2017 Issued
Array ( [id] => 13068835 [patent_doc_number] => 10055197 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-08-21 [patent_title] => Differential recursive evaluation [patent_app_type] => utility [patent_app_number] => 15/605090 [patent_app_country] => US [patent_app_date] => 2017-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 18750 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15605090 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/605090
Differential recursive evaluation May 24, 2017 Issued
Array ( [id] => 11951313 [patent_doc_number] => 20170255464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-07 [patent_title] => 'MERGED FLOATING POINT OPERATION USING A MODEBIT' [patent_app_type] => utility [patent_app_number] => 15/604263 [patent_app_country] => US [patent_app_date] => 2017-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4587 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15604263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/604263
Merged floating point operation using a modebit May 23, 2017 Issued
Array ( [id] => 12032672 [patent_doc_number] => 20170322771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'Configurable Processor with In-Package Look-Up Table' [patent_app_type] => utility [patent_app_number] => 15/588642 [patent_app_country] => US [patent_app_date] => 2017-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15588642 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/588642
Configurable Processor with In-Package Look-Up Table May 5, 2017 Abandoned
Array ( [id] => 12032674 [patent_doc_number] => 20170322773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-09 [patent_title] => 'INTERNALLY TRUNCATED MULTIPLIER' [patent_app_type] => utility [patent_app_number] => 15/587096 [patent_app_country] => US [patent_app_date] => 2017-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4008 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15587096 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/587096
Internally truncated multiplier May 3, 2017 Issued
Array ( [id] => 13527225 [patent_doc_number] => 20180315155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => CONFIGRABLE CONVOLUTION ENGINE FOR INTERLEAVED CHANNEL DATA [patent_app_type] => utility [patent_app_number] => 15/499543 [patent_app_country] => US [patent_app_date] => 2017-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18773 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15499543 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/499543
Configurable convolution engine for interleaved channel data Apr 26, 2017 Issued
Array ( [id] => 13895003 [patent_doc_number] => 10200060 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-02-05 [patent_title] => Content-aware lossless compression and decompression of floating point data [patent_app_type] => utility [patent_app_number] => 15/463323 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 8846 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15463323 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/463323
Content-aware lossless compression and decompression of floating point data Mar 19, 2017 Issued
Array ( [id] => 13665273 [patent_doc_number] => 10162799 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Buffer device and convolution operation device and method [patent_app_type] => utility [patent_app_number] => 15/459675 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6736 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/459675
Buffer device and convolution operation device and method Mar 14, 2017 Issued
Array ( [id] => 11877182 [patent_doc_number] => 09748967 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-29 [patent_title] => 'Periodic signal averaging with a time interleaving analog to digital converter' [patent_app_type] => utility [patent_app_number] => 15/447728 [patent_app_country] => US [patent_app_date] => 2017-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4266 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15447728 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/447728
Periodic signal averaging with a time interleaving analog to digital converter Mar 1, 2017 Issued
Array ( [id] => 13818099 [patent_doc_number] => 10185818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-22 [patent_title] => Methods for generating random data using phase change materials and related devices and systems [patent_app_type] => utility [patent_app_number] => 15/438346 [patent_app_country] => US [patent_app_date] => 2017-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 6557 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15438346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/438346
Methods for generating random data using phase change materials and related devices and systems Feb 20, 2017 Issued
Array ( [id] => 12688003 [patent_doc_number] => 20180121167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => HIGH RADIX 16 SQUARE ROOT ESTIMATE [patent_app_type] => utility [patent_app_number] => 15/419757 [patent_app_country] => US [patent_app_date] => 2017-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15419757 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/419757
High radix 16 square root estimate Jan 29, 2017 Issued
Array ( [id] => 13332551 [patent_doc_number] => 20180217813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => SHIFT AND DIVIDE OPERATIONS USING FLOATING-POINT ARITHMETIC [patent_app_type] => utility [patent_app_number] => 15/417472 [patent_app_country] => US [patent_app_date] => 2017-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5911 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15417472 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/417472
Shift and divide operations using floating-point arithmetic Jan 26, 2017 Issued
Array ( [id] => 11823791 [patent_doc_number] => 20170212728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'MAGNETIC RANDOM NUMBER GENERATOR' [patent_app_type] => utility [patent_app_number] => 15/411811 [patent_app_country] => US [patent_app_date] => 2017-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8327 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15411811 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/411811
Magnetic random number generator Jan 19, 2017 Issued
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