Search

Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 107250 [patent_doc_number] => 07725512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-05-25 [patent_title] => 'Apparatus and method for performing multiple exclusive or operations using multiplication circuitry' [patent_app_type] => utility [patent_app_number] => 11/412694 [patent_app_country] => US [patent_app_date] => 2006-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3222 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/725/07725512.pdf [firstpage_image] =>[orig_patent_app_number] => 11412694 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/412694
Apparatus and method for performing multiple exclusive or operations using multiplication circuitry Apr 25, 2006 Issued
Array ( [id] => 5620981 [patent_doc_number] => 20060190516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Digital signal processing element having an arithmetic logic unit' [patent_app_type] => utility [patent_app_number] => 11/408364 [patent_app_country] => US [patent_app_date] => 2006-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 26565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20060190516.pdf [firstpage_image] =>[orig_patent_app_number] => 11408364 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/408364
Digital signal processing element having an arithmetic logic unit Apr 20, 2006 Issued
Array ( [id] => 8703678 [patent_doc_number] => 08396913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Fast fourier transform architecture' [patent_app_type] => utility [patent_app_number] => 11/911088 [patent_app_country] => US [patent_app_date] => 2006-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 5126 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11911088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/911088
Fast fourier transform architecture Apr 10, 2006 Issued
Array ( [id] => 107264 [patent_doc_number] => 07725522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'High-speed integer multiplier unit handling signed and unsigned operands and occupying a small area' [patent_app_type] => utility [patent_app_number] => 11/308592 [patent_app_country] => US [patent_app_date] => 2006-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4857 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/725/07725522.pdf [firstpage_image] =>[orig_patent_app_number] => 11308592 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308592
High-speed integer multiplier unit handling signed and unsigned operands and occupying a small area Apr 9, 2006 Issued
Array ( [id] => 5679242 [patent_doc_number] => 20060184598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Optimized discrete fourier transform method and apparatus using prime factor algorithm' [patent_app_type] => utility [patent_app_number] => 11/400566 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20060184598.pdf [firstpage_image] =>[orig_patent_app_number] => 11400566 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/400566
Optimized discrete fourier transform method and apparatus using prime factor algorithm Apr 6, 2006 Issued
Array ( [id] => 106490 [patent_doc_number] => 07730118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Multiply-accumulate unit and method of operation' [patent_app_type] => utility [patent_app_number] => 11/400020 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3630 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/730/07730118.pdf [firstpage_image] =>[orig_patent_app_number] => 11400020 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/400020
Multiply-accumulate unit and method of operation Apr 6, 2006 Issued
Array ( [id] => 5689749 [patent_doc_number] => 20060288064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Reduced complexity recursive least square lattice structure adaptive filter by means of estimating the backward and forward error prediction squares using binomial expansion' [patent_app_type] => utility [patent_app_number] => 11/399906 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4743 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20060288064.pdf [firstpage_image] =>[orig_patent_app_number] => 11399906 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399906
Reduced complexity recursive least square lattice structure adaptive filter by means of estimating the backward and forward error prediction squares using binomial expansion Apr 6, 2006 Issued
Array ( [id] => 37905 [patent_doc_number] => 07788307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-31 [patent_title] => 'Method and apparatus for generating random number' [patent_app_type] => utility [patent_app_number] => 11/279082 [patent_app_country] => US [patent_app_date] => 2006-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6793 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/788/07788307.pdf [firstpage_image] =>[orig_patent_app_number] => 11279082 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/279082
Method and apparatus for generating random number Apr 6, 2006 Issued
Array ( [id] => 5124984 [patent_doc_number] => 20070237255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'System and method for efficient rectangular to polar signal conversion using cordic algorithm' [patent_app_type] => utility [patent_app_number] => 11/399272 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5353 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20070237255.pdf [firstpage_image] =>[orig_patent_app_number] => 11399272 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/399272
System and method for efficient rectangular to polar signal conversion using cordic algorithm Apr 4, 2006 Issued
Array ( [id] => 5362714 [patent_doc_number] => 20090037508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'METHOD FOR IMPLEMENTING MONTGOMERY MODULAR MULTIPLICATION AND DEVICE THEREFORE' [patent_app_type] => utility [patent_app_number] => 11/910443 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5550 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20090037508.pdf [firstpage_image] =>[orig_patent_app_number] => 11910443 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910443
Method for implementing montgomery modular multiplication and device therefore Mar 30, 2006 Issued
Array ( [id] => 17257 [patent_doc_number] => 07805479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-28 [patent_title] => 'Scalable, faster method and apparatus for montgomery multiplication' [patent_app_type] => utility [patent_app_number] => 11/277758 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 7389 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/805/07805479.pdf [firstpage_image] =>[orig_patent_app_number] => 11277758 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277758
Scalable, faster method and apparatus for montgomery multiplication Mar 27, 2006 Issued
Array ( [id] => 5064643 [patent_doc_number] => 20070226285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'A HIGH SPEED FFT HARDWARE ARCHITECTURE FOR AN OFDM PROCESSOR' [patent_app_type] => utility [patent_app_number] => 11/277366 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3933 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20070226285.pdf [firstpage_image] =>[orig_patent_app_number] => 11277366 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277366
High speed FFT hardware architecture for an OFDM processor Mar 23, 2006 Issued
Array ( [id] => 5454357 [patent_doc_number] => 20090070394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'CANONICAL SIGNED DIGIT MULTIPLIER' [patent_app_type] => utility [patent_app_number] => 11/910454 [patent_app_country] => US [patent_app_date] => 2006-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7713 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070394.pdf [firstpage_image] =>[orig_patent_app_number] => 11910454 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/910454
Canonical signed digit multiplier Mar 22, 2006 Issued
Array ( [id] => 107256 [patent_doc_number] => 07725516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Fast DCT algorithm for DSP with VLIW architecture' [patent_app_type] => utility [patent_app_number] => 11/377134 [patent_app_country] => US [patent_app_date] => 2006-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7190 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/725/07725516.pdf [firstpage_image] =>[orig_patent_app_number] => 11377134 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/377134
Fast DCT algorithm for DSP with VLIW architecture Mar 14, 2006 Issued
Array ( [id] => 135956 [patent_doc_number] => 07702705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-20 [patent_title] => 'Random number generation circuit' [patent_app_type] => utility [patent_app_number] => 11/376659 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 6562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/702/07702705.pdf [firstpage_image] =>[orig_patent_app_number] => 11376659 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/376659
Random number generation circuit Mar 13, 2006 Issued
Array ( [id] => 468259 [patent_doc_number] => RE039693 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2007-06-12 [patent_title] => 'Digital frequency response compensator and arbitrary response generator system' [patent_app_type] => reissue [patent_app_number] => 11/364796 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 13519 [patent_no_of_claims] => 91 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/039/RE039693.pdf [firstpage_image] =>[orig_patent_app_number] => 11364796 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/364796
Digital frequency response compensator and arbitrary response generator system Feb 27, 2006 Issued
Array ( [id] => 5108496 [patent_doc_number] => 20070067374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-22 [patent_title] => 'Random Number Generating Circuit' [patent_app_type] => utility [patent_app_number] => 11/275874 [patent_app_country] => US [patent_app_date] => 2006-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7852 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20070067374.pdf [firstpage_image] =>[orig_patent_app_number] => 11275874 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275874
Random Number Generating Circuit Jan 31, 2006 Abandoned
Array ( [id] => 5701531 [patent_doc_number] => 20060218216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Programmable logic devices with function-specific blocks' [patent_app_type] => utility [patent_app_number] => 11/343919 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10561 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20060218216.pdf [firstpage_image] =>[orig_patent_app_number] => 11343919 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/343919
Programmable logic devices with function-specific blocks Jan 29, 2006 Abandoned
Array ( [id] => 5603826 [patent_doc_number] => 20060294173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Implementation of a transform and of a subsequent quantization' [patent_app_type] => utility [patent_app_number] => 11/342258 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7890 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294173.pdf [firstpage_image] =>[orig_patent_app_number] => 11342258 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/342258
Implementation of a transform and of a subsequent quantization Jan 26, 2006 Abandoned
Array ( [id] => 5178952 [patent_doc_number] => 20070180012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Approximating Function Properties with Expander Graphs' [patent_app_type] => utility [patent_app_number] => 11/275625 [patent_app_country] => US [patent_app_date] => 2006-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20070180012.pdf [firstpage_image] =>[orig_patent_app_number] => 11275625 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/275625
Approximating function properties with expander graphs Jan 18, 2006 Issued
Menu