Richard L Schilling
Examiner (ID: 9849)
Most Active Art Unit | 1506 |
Art Unit(s) | 1506, 1752, 1302, 1795, 1715, 1113 |
Total Applications | 3259 |
Issued Applications | 2786 |
Pending Applications | 25 |
Abandoned Applications | 448 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 171726
[patent_doc_number] => 07668893
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Data generator having linear feedback shift registers for generating data pattern in forward and reverse orders'
[patent_app_type] => utility
[patent_app_number] => 11/215890
[patent_app_country] => US
[patent_app_date] => 2005-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 8217
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/668/07668893.pdf
[firstpage_image] =>[orig_patent_app_number] => 11215890
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/215890 | Data generator having linear feedback shift registers for generating data pattern in forward and reverse orders | Aug 29, 2005 | Issued |
Array
(
[id] => 5528676
[patent_doc_number] => 20090198753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-06
[patent_title] => 'Data processing method by passage between different sub-band domains'
[patent_app_type] => utility
[patent_app_number] => 11/662980
[patent_app_country] => US
[patent_app_date] => 2005-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 13094
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0198/20090198753.pdf
[firstpage_image] =>[orig_patent_app_number] => 11662980
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/662980 | Data processing method by passage between different sub-band domains | Aug 22, 2005 | Issued |
Array
(
[id] => 17261
[patent_doc_number] => 07805480
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-28
[patent_title] => 'Randomized modular polynomial reduction method and hardware therefor'
[patent_app_type] => utility
[patent_app_number] => 11/203939
[patent_app_country] => US
[patent_app_date] => 2005-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3056
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/805/07805480.pdf
[firstpage_image] =>[orig_patent_app_number] => 11203939
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/203939 | Randomized modular polynomial reduction method and hardware therefor | Aug 14, 2005 | Issued |
Array
(
[id] => 179873
[patent_doc_number] => 07657587
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Multi-dimensional fast fourier transform'
[patent_app_type] => utility
[patent_app_number] => 11/201110
[patent_app_country] => US
[patent_app_date] => 2005-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4759
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/657/07657587.pdf
[firstpage_image] =>[orig_patent_app_number] => 11201110
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/201110 | Multi-dimensional fast fourier transform | Aug 10, 2005 | Issued |
Array
(
[id] => 1078747
[patent_doc_number] => 07617267
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-11-10
[patent_title] => 'Configurable multi-tap filter'
[patent_app_type] => utility
[patent_app_number] => 11/201563
[patent_app_country] => US
[patent_app_date] => 2005-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 8997
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/617/07617267.pdf
[firstpage_image] =>[orig_patent_app_number] => 11201563
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/201563 | Configurable multi-tap filter | Aug 9, 2005 | Issued |
Array
(
[id] => 5155809
[patent_doc_number] => 20070038692
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'Correlator having user-defined processing'
[patent_app_type] => utility
[patent_app_number] => 11/202149
[patent_app_country] => US
[patent_app_date] => 2005-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3073
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0038/20070038692.pdf
[firstpage_image] =>[orig_patent_app_number] => 11202149
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/202149 | Correlator having user-defined processing | Aug 9, 2005 | Issued |
Array
(
[id] => 5728461
[patent_doc_number] => 20060059222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Logic entity with two outputs for efficient adder and other macro implementations'
[patent_app_type] => utility
[patent_app_number] => 11/196797
[patent_app_country] => US
[patent_app_date] => 2005-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 11831
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0059/20060059222.pdf
[firstpage_image] =>[orig_patent_app_number] => 11196797
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/196797 | Logic entity with two outputs for efficient adder and other macro implementations | Aug 2, 2005 | Issued |
Array
(
[id] => 8246981
[patent_doc_number] => 08204924
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-06-19
[patent_title] => 'Variable precision wavelets'
[patent_app_type] => utility
[patent_app_number] => 11/189147
[patent_app_country] => US
[patent_app_date] => 2005-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4959
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/204/08204924.pdf
[firstpage_image] =>[orig_patent_app_number] => 11189147
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/189147 | Variable precision wavelets | Jul 24, 2005 | Issued |
Array
(
[id] => 231145
[patent_doc_number] => 07603399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Method and device for forming noise-filtered output values from input values encumbered with noise'
[patent_app_type] => utility
[patent_app_number] => 11/189676
[patent_app_country] => US
[patent_app_date] => 2005-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3579
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/603/07603399.pdf
[firstpage_image] =>[orig_patent_app_number] => 11189676
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/189676 | Method and device for forming noise-filtered output values from input values encumbered with noise | Jul 24, 2005 | Issued |
Array
(
[id] => 231146
[patent_doc_number] => 07603400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Method and system for filter loop with saturation'
[patent_app_type] => utility
[patent_app_number] => 11/187678
[patent_app_country] => US
[patent_app_date] => 2005-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4396
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/603/07603400.pdf
[firstpage_image] =>[orig_patent_app_number] => 11187678
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/187678 | Method and system for filter loop with saturation | Jul 21, 2005 | Issued |
Array
(
[id] => 5770569
[patent_doc_number] => 20060020649
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'High-order delta-sigma noise shaping in direct digital frequency synthesis'
[patent_app_type] => utility
[patent_app_number] => 11/187365
[patent_app_country] => US
[patent_app_date] => 2005-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4551
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020649.pdf
[firstpage_image] =>[orig_patent_app_number] => 11187365
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/187365 | High-order delta-sigma noise shaping in direct digital frequency synthesis | Jul 21, 2005 | Issued |
Array
(
[id] => 4621438
[patent_doc_number] => 08001169
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-16
[patent_title] => 'Spread spectrum method with elimination of sub-bands'
[patent_app_type] => utility
[patent_app_number] => 11/658413
[patent_app_country] => US
[patent_app_date] => 2005-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 3398
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/001/08001169.pdf
[firstpage_image] =>[orig_patent_app_number] => 11658413
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/658413 | Spread spectrum method with elimination of sub-bands | Jul 19, 2005 | Issued |
Array
(
[id] => 7591534
[patent_doc_number] => 07653673
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-01-26
[patent_title] => 'Efficient method for identifying few largest differences from a list of numbers'
[patent_app_type] => utility
[patent_app_number] => 11/184118
[patent_app_country] => US
[patent_app_date] => 2005-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2193
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/653/07653673.pdf
[firstpage_image] =>[orig_patent_app_number] => 11184118
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/184118 | Efficient method for identifying few largest differences from a list of numbers | Jul 18, 2005 | Issued |
Array
(
[id] => 4727616
[patent_doc_number] => 20080207160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'Discrete Signal Processing Device and Processing Method'
[patent_app_type] => utility
[patent_app_number] => 11/572737
[patent_app_country] => US
[patent_app_date] => 2005-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4191
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0207/20080207160.pdf
[firstpage_image] =>[orig_patent_app_number] => 11572737
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/572737 | Discrete signal processing device and processing method | Jul 13, 2005 | Issued |
Array
(
[id] => 493300
[patent_doc_number] => RE039578
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2007-04-17
[patent_title] => 'Pipelined carry-lookahead generation for a fast incrementer'
[patent_app_type] => reissue
[patent_app_number] => 11/176885
[patent_app_country] => US
[patent_app_date] => 2005-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4117
[patent_no_of_claims] => 74
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/039/RE039578.pdf
[firstpage_image] =>[orig_patent_app_number] => 11176885
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/176885 | Pipelined carry-lookahead generation for a fast incrementer | Jul 6, 2005 | Issued |
Array
(
[id] => 5770578
[patent_doc_number] => 20060020655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-01-26
[patent_title] => 'Library of low-cost low-power and high-performance multipliers'
[patent_app_type] => utility
[patent_app_number] => 11/170417
[patent_app_country] => US
[patent_app_date] => 2005-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 7190
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0020/20060020655.pdf
[firstpage_image] =>[orig_patent_app_number] => 11170417
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/170417 | Library of low-cost low-power and high-performance multipliers | Jun 28, 2005 | Abandoned |
Array
(
[id] => 261731
[patent_doc_number] => 07574465
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Displaying variables stored in calculators'
[patent_app_type] => utility
[patent_app_number] => 11/171150
[patent_app_country] => US
[patent_app_date] => 2005-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 4075
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/574/07574465.pdf
[firstpage_image] =>[orig_patent_app_number] => 11171150
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/171150 | Displaying variables stored in calculators | Jun 28, 2005 | Issued |
Array
(
[id] => 5143614
[patent_doc_number] => 20070005830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-04
[patent_title] => 'Systems and methods for weighted overlap and add processing'
[patent_app_type] => utility
[patent_app_number] => 11/170794
[patent_app_country] => US
[patent_app_date] => 2005-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5657
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0005/20070005830.pdf
[firstpage_image] =>[orig_patent_app_number] => 11170794
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/170794 | Systems and methods for weighted overlap and add processing | Jun 28, 2005 | Issued |
Array
(
[id] => 5852720
[patent_doc_number] => 20060235911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-19
[patent_title] => 'Contemporaneous symbolic and numeric presentation'
[patent_app_type] => utility
[patent_app_number] => 11/171143
[patent_app_country] => US
[patent_app_date] => 2005-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3155
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20060235911.pdf
[firstpage_image] =>[orig_patent_app_number] => 11171143
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/171143 | Contemporaneous symbolic and numeric presentation | Jun 28, 2005 | Issued |
Array
(
[id] => 7598220
[patent_doc_number] => 07584233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-01
[patent_title] => 'System and method of counting leading zeros and counting leading ones in a digital signal processor'
[patent_app_type] => utility
[patent_app_number] => 11/170288
[patent_app_country] => US
[patent_app_date] => 2005-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 9561
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/584/07584233.pdf
[firstpage_image] =>[orig_patent_app_number] => 11170288
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/170288 | System and method of counting leading zeros and counting leading ones in a digital signal processor | Jun 27, 2005 | Issued |