Richard L Schilling
Examiner (ID: 9849)
Most Active Art Unit | 1506 |
Art Unit(s) | 1506, 1752, 1302, 1795, 1715, 1113 |
Total Applications | 3259 |
Issued Applications | 2786 |
Pending Applications | 25 |
Abandoned Applications | 448 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 600065
[patent_doc_number] => 07437401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-14
[patent_title] => 'Multiplier-accumulator block mode splitting'
[patent_app_type] => utility
[patent_app_number] => 10/783820
[patent_app_country] => US
[patent_app_date] => 2004-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 7867
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/437/07437401.pdf
[firstpage_image] =>[orig_patent_app_number] => 10783820
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/783820 | Multiplier-accumulator block mode splitting | Feb 19, 2004 | Issued |
Array
(
[id] => 752599
[patent_doc_number] => 07028064
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-04-11
[patent_title] => 'Optimized discrete fourier transform method and apparatus using prime factor algorithm'
[patent_app_type] => utility
[patent_app_number] => 10/782035
[patent_app_country] => US
[patent_app_date] => 2004-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 4558
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/028/07028064.pdf
[firstpage_image] =>[orig_patent_app_number] => 10782035
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/782035 | Optimized discrete fourier transform method and apparatus using prime factor algorithm | Feb 18, 2004 | Issued |
Array
(
[id] => 604596
[patent_doc_number] => 07433912
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-10-07
[patent_title] => 'Multiplier structure supporting different precision multiplication operations'
[patent_app_type] => utility
[patent_app_number] => 10/782162
[patent_app_country] => US
[patent_app_date] => 2004-02-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 2547
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/433/07433912.pdf
[firstpage_image] =>[orig_patent_app_number] => 10782162
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/782162 | Multiplier structure supporting different precision multiplication operations | Feb 18, 2004 | Issued |
Array
(
[id] => 7140393
[patent_doc_number] => 20050182810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-18
[patent_title] => 'Fast method for calculating powers of two as a floating point data type'
[patent_app_type] => utility
[patent_app_number] => 10/781429
[patent_app_country] => US
[patent_app_date] => 2004-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3274
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0182/20050182810.pdf
[firstpage_image] =>[orig_patent_app_number] => 10781429
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781429 | Fast method for calculating powers of two as a floating point data type | Feb 17, 2004 | Issued |
Array
(
[id] => 444053
[patent_doc_number] => 07260591
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Method for synthesizing linear finite state machines'
[patent_app_type] => utility
[patent_app_number] => 10/781031
[patent_app_country] => US
[patent_app_date] => 2004-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 31
[patent_no_of_words] => 5113
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/260/07260591.pdf
[firstpage_image] =>[orig_patent_app_number] => 10781031
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/781031 | Method for synthesizing linear finite state machines | Feb 16, 2004 | Issued |
Array
(
[id] => 7154059
[patent_doc_number] => 20040172435
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-02
[patent_title] => 'Architecture and method for performing a fast fourier transform and OFDM reciever employing the same'
[patent_app_type] => new
[patent_app_number] => 10/780003
[patent_app_country] => US
[patent_app_date] => 2004-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3676
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0172/20040172435.pdf
[firstpage_image] =>[orig_patent_app_number] => 10780003
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/780003 | Architecture and method for performing a fast fourier transform and OFDM reciever employing the same | Feb 16, 2004 | Abandoned |
Array
(
[id] => 633123
[patent_doc_number] => 07133888
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-07
[patent_title] => 'Method and programmable apparatus for quantum computing'
[patent_app_type] => utility
[patent_app_number] => 10/780292
[patent_app_country] => US
[patent_app_date] => 2004-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 34
[patent_no_of_words] => 12727
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/133/07133888.pdf
[firstpage_image] =>[orig_patent_app_number] => 10780292
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/780292 | Method and programmable apparatus for quantum computing | Feb 16, 2004 | Issued |
Array
(
[id] => 7456162
[patent_doc_number] => 20040186871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Multiplier circuit'
[patent_app_type] => new
[patent_app_number] => 10/487109
[patent_app_country] => US
[patent_app_date] => 2004-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2633
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20040186871.pdf
[firstpage_image] =>[orig_patent_app_number] => 10487109
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/487109 | Multiplier circuit | Feb 12, 2004 | Abandoned |
Array
(
[id] => 7672213
[patent_doc_number] => 20040181566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-16
[patent_title] => 'Power raising circuit'
[patent_app_type] => new
[patent_app_number] => 10/487106
[patent_app_country] => US
[patent_app_date] => 2004-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3291
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 27
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0181/20040181566.pdf
[firstpage_image] =>[orig_patent_app_number] => 10487106
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/487106 | Power raising circuit | Feb 12, 2004 | Abandoned |
Array
(
[id] => 7159461
[patent_doc_number] => 20050027773
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-03
[patent_title] => 'Method and system for performing parallel integer multiply accumulate operations on packed data'
[patent_app_type] => utility
[patent_app_number] => 10/775461
[patent_app_country] => US
[patent_app_date] => 2004-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3869
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20050027773.pdf
[firstpage_image] =>[orig_patent_app_number] => 10775461
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/775461 | Method and system for performing parallel integer multiply accumulate operations on packed data | Feb 8, 2004 | Issued |
Array
(
[id] => 444056
[patent_doc_number] => 07260594
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-21
[patent_title] => 'Arithmetic logic unit over finite field GF(2m)'
[patent_app_type] => utility
[patent_app_number] => 10/771592
[patent_app_country] => US
[patent_app_date] => 2004-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3455
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/260/07260594.pdf
[firstpage_image] =>[orig_patent_app_number] => 10771592
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/771592 | Arithmetic logic unit over finite field GF(2m) | Feb 2, 2004 | Issued |
Array
(
[id] => 7456195
[patent_doc_number] => 20040186874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'Method and apparatus for accumulating partial quotients in a digital processor'
[patent_app_type] => new
[patent_app_number] => 10/769265
[patent_app_country] => US
[patent_app_date] => 2004-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4787
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20040186874.pdf
[firstpage_image] =>[orig_patent_app_number] => 10769265
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/769265 | Method and apparatus for accumulating partial quotients in a digital processor | Jan 29, 2004 | Abandoned |
Array
(
[id] => 929563
[patent_doc_number] => 07315875
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-01
[patent_title] => 'Data filtering'
[patent_app_type] => utility
[patent_app_number] => 10/764473
[patent_app_country] => US
[patent_app_date] => 2004-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 3441
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 18
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/315/07315875.pdf
[firstpage_image] =>[orig_patent_app_number] => 10764473
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764473 | Data filtering | Jan 26, 2004 | Issued |
Array
(
[id] => 7076804
[patent_doc_number] => 20050149594
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'METHOD FOR DETERMINING AN OUTPUT VALUE HAVING A LOWEST ERROR VALUE FROM AN INPUT VALUE'
[patent_app_type] => utility
[patent_app_number] => 10/707701
[patent_app_country] => US
[patent_app_date] => 2004-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 1915
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0149/20050149594.pdf
[firstpage_image] =>[orig_patent_app_number] => 10707701
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/707701 | Method for determining an output value having a lowest error value from an input value | Jan 4, 2004 | Issued |
Array
(
[id] => 7600129
[patent_doc_number] => 07386581
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-10
[patent_title] => 'Performance FIR filter'
[patent_app_type] => utility
[patent_app_number] => 10/750019
[patent_app_country] => US
[patent_app_date] => 2003-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4149
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/386/07386581.pdf
[firstpage_image] =>[orig_patent_app_number] => 10750019
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/750019 | Performance FIR filter | Dec 30, 2003 | Issued |
Array
(
[id] => 7441542
[patent_doc_number] => 20040210616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-21
[patent_title] => 'Method and apparatus for efficient integer transform'
[patent_app_type] => new
[patent_app_number] => 10/749738
[patent_app_country] => US
[patent_app_date] => 2003-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 41
[patent_no_of_words] => 20315
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0210/20040210616.pdf
[firstpage_image] =>[orig_patent_app_number] => 10749738
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/749738 | Method and apparatus for efficient integer transform | Dec 29, 2003 | Issued |
Array
(
[id] => 5630512
[patent_doc_number] => 20060146980
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Apparatus and method for midamble generation'
[patent_app_type] => utility
[patent_app_number] => 10/540801
[patent_app_country] => US
[patent_app_date] => 2003-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3307
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0146/20060146980.pdf
[firstpage_image] =>[orig_patent_app_number] => 10540801
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/540801 | Apparatus and method for midamble generation | Dec 21, 2003 | Abandoned |
Array
(
[id] => 7340725
[patent_doc_number] => 20040133615
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-08
[patent_title] => 'Data processing apparatus for used in FFT/IFFT and method thereof'
[patent_app_type] => new
[patent_app_number] => 10/739321
[patent_app_country] => US
[patent_app_date] => 2003-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1969
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0133/20040133615.pdf
[firstpage_image] =>[orig_patent_app_number] => 10739321
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/739321 | Data processing apparatus for used in FFT/IFFT and method thereof | Dec 18, 2003 | Abandoned |
Array
(
[id] => 6999199
[patent_doc_number] => 20050138095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Method for base two logarithmic estimation'
[patent_app_type] => utility
[patent_app_number] => 10/739427
[patent_app_country] => US
[patent_app_date] => 2003-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2873
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20050138095.pdf
[firstpage_image] =>[orig_patent_app_number] => 10739427
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/739427 | Method for base two logarithmic estimation | Dec 17, 2003 | Abandoned |
Array
(
[id] => 6999205
[patent_doc_number] => 20050138101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Methods and apparatus for performing mathematical operations using scaled integers'
[patent_app_type] => utility
[patent_app_number] => 10/740086
[patent_app_country] => US
[patent_app_date] => 2003-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 13839
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20050138101.pdf
[firstpage_image] =>[orig_patent_app_number] => 10740086
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/740086 | Methods and apparatus for performing mathematical operations using scaled integers | Dec 17, 2003 | Issued |