
Richard L Schilling
Examiner (ID: 9999)
Most Active Art Unit | 1506 |
Art Unit(s) | 1795, 1715, 1302, 1113, 1506, 1752 |
Total Applications | 3259 |
Issued Applications | 2786 |
Pending Applications | 23 |
Abandoned Applications | 403 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 5203661
[patent_doc_number] => 20070025140
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[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'SRAM cell with independent static noise margin, trip voltage, and read current optimization'
[patent_app_type] => utility
[patent_app_number] => 11/191348
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Array
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[patent_doc_number] => 20060279988
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[patent_issue_date] => 2006-12-14
[patent_title] => 'System and method for matching resistance in a non-volatile memory'
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Array
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[patent_issue_date] => 2007-10-16
[patent_title] => 'Memory device and method having multiple address, data and command buses'
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[patent_app_number] => 11/190270
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[patent_app_date] => 2005-07-26
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Array
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[patent_issue_date] => 2007-12-04
[patent_title] => 'Method of controlling mode register set operation in memory device and circuit thereof'
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[patent_app_date] => 2005-07-26
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Array
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[patent_title] => 'Ferroelectric memory'
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Array
(
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[patent_title] => 'Programmable memory access parameters'
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Array
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Array
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[id] => 5240970
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[patent_issue_date] => 2007-01-25
[patent_title] => 'Methods and apparatus for accessing memory'
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[patent_app_number] => 11/186606
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/186606 | Methods and apparatus for accessing memory | Jul 20, 2005 | Issued |
Array
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[id] => 5819244
[patent_doc_number] => 20060023557
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[patent_issue_date] => 2006-02-02
[patent_title] => 'Multiport memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/184926 | Multiport memory | Jul 19, 2005 | Issued |
Array
(
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[patent_title] => 'Channel erase type nonvolatile semiconductor memory device and electronic card and electronic apparatus using the device'
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[patent_app_number] => 11/185228
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Array
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Array
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[id] => 482252
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[patent_title] => 'Glitch protect valid cell and method for maintaining a desired state value'
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Array
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[patent_title] => 'Content addressable memory (CAM) devices that support background BIST and BISR operations and methods of operating same'
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Array
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Array
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Array
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[firstpage_image] =>[orig_patent_app_number] => 11126495
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/126495 | Unified multilevel cell memory | May 9, 2005 | Issued |