Richard L Schilling

Array ( [id] => 12611697 [patent_doc_number] => 20180095729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => INSTRUCTION TO PROVIDE TRUE RANDOM NUMBERS [patent_app_type] => utility [patent_app_number] => 15/281159 [patent_app_country] => US [patent_app_date] => 2016-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15281159 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12591336 [patent_doc_number] => 20180088941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => Instruction and Logic for Detecting Numeric Accumulation Error [patent_app_type] => utility [patent_app_number] => 15/280564 [patent_app_country] => US [patent_app_date] => 2016-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15280564 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12591333 [patent_doc_number] => 20180088940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => Instruction and Logic for Early Underflow Detection and Rounder Bypass [patent_app_type] => utility [patent_app_number] => 15/280324 [patent_app_country] => US [patent_app_date] => 2016-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15280324 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14046895 [patent_doc_number] => 20190079554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => METHOD AND APPARATUS FOR DETERMINING AN OUTPUT VALUE REPRESENTING A PICTURE DATA BY APPLYING A PIECE-WISE LINEAR FUNCTION ON AN INPUT DATA REPRESENTING A PICTURE DATA [patent_app_type] => utility [patent_app_number] => 15/765636 [patent_app_country] => US [patent_app_date] => 2016-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15765636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13254801 [patent_doc_number] => 10140091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-27 [patent_title] => Integrated circuits with specialized processing blocks for performing floating-point fast fourier transforms and complex multiplication [patent_app_type] => utility [patent_app_number] => 15/277955 [patent_app_country] => US [patent_app_date] => 2016-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7646 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15277955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11530896 [patent_doc_number] => 20170090873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-30 [patent_title] => 'SECURE TRUE RANDOM NUMBER GENERATION USING 1.5-T TRANSISTOR FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 15/276087 [patent_app_country] => US [patent_app_date] => 2016-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7096 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15276087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13143489 [patent_doc_number] => 10089078 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-02 [patent_title] => Circuit for performing a multiply-and-accumulate operation [patent_app_type] => utility [patent_app_number] => 15/275037 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11315 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15275037 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12453960 [patent_doc_number] => 09983851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-29 [patent_title] => Checksum circuit [patent_app_type] => utility [patent_app_number] => 15/274844 [patent_app_country] => US [patent_app_date] => 2016-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15274844 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11516215 [patent_doc_number] => 20170083289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'METHOD FOR GENERATING TRUE RANDOM NUMBERS ON A MULTIPROCESSOR SYSTEM AND THE SAME' [patent_app_type] => utility [patent_app_number] => 15/272550 [patent_app_country] => US [patent_app_date] => 2016-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4239 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272550 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13110045 [patent_doc_number] => 10073676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-11 [patent_title] => Reduced floating-point precision arithmetic circuitry [patent_app_type] => utility [patent_app_number] => 15/272231 [patent_app_country] => US [patent_app_date] => 2016-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15272231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12241923 [patent_doc_number] => 20180074787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-15 [patent_title] => 'FAST FILTERING' [patent_app_type] => utility [patent_app_number] => 15/266179 [patent_app_country] => US [patent_app_date] => 2016-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3987 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15266179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12234858 [patent_doc_number] => 20180067721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'FLOATING POINT ADDITION WITH EARLY SHIFTING' [patent_app_type] => utility [patent_app_number] => 15/258051 [patent_app_country] => US [patent_app_date] => 2016-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5602 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15258051 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13029181 [patent_doc_number] => 10037210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Apparatus and method for vector instructions for large integer arithmetic [patent_app_type] => utility [patent_app_number] => 15/257833 [patent_app_country] => US [patent_app_date] => 2016-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 33 [patent_no_of_words] => 16893 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15257833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12207434 [patent_doc_number] => 20180052660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'APPARATUS AND METHOD FOR FIXED POINT TO FLOATING POINT CONVERSION AND NEGATIVE POWER OF TWO DETECTOR' [patent_app_type] => utility [patent_app_number] => 15/242782 [patent_app_country] => US [patent_app_date] => 2016-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5684 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15242782 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11447040 [patent_doc_number] => 20170048061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'APPARATUS FOR GENERATING RANDOM NUMBER' [patent_app_type] => utility [patent_app_number] => 15/218530 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12705 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15218530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13134141 [patent_doc_number] => 10085022 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-25 [patent_title] => Two-dimensional transformation with minimum buffering [patent_app_type] => utility [patent_app_number] => 15/210169 [patent_app_country] => US [patent_app_date] => 2016-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15210169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12121123 [patent_doc_number] => 20180004709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'SYSTEM AND METHOD FOR GPU MAXIMUM REGISTER COUNT OPTIMIZATION APPLIED TO GENERAL MATRIX-MATRIX MULTIPLICATION' [patent_app_type] => utility [patent_app_number] => 15/201123 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15201123 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11109639 [patent_doc_number] => 20160306609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'DIVISION OPERATIONS FOR MEMORY' [patent_app_type] => utility [patent_app_number] => 15/194164 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 17141 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15194164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12357096 [patent_doc_number] => 09954550 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-04-24 [patent_title] => Content-aware compression of data using window-based selection from multiple prediction functions [patent_app_type] => utility [patent_app_number] => 15/189318 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10262 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13639239 [patent_doc_number] => 09846579 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-12-19 [patent_title] => Unified integer and floating-point compare circuitry [patent_app_type] => utility [patent_app_number] => 15/180725 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6287 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15180725 [rel_patent_id] =>[rel_patent_doc_number] =>)