Search

Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
09/857503 Serial-parallel binary multiplier Jan 23, 2002 Abandoned
Array ( [id] => 1356261 [patent_doc_number] => 06591286 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Pipelined carry-lookahead generation for a fast incrementer' [patent_app_type] => B1 [patent_app_number] => 09/683563 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4110 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/591/06591286.pdf [firstpage_image] =>[orig_patent_app_number] => 09683563 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/683563
Pipelined carry-lookahead generation for a fast incrementer Jan 17, 2002 Issued
Array ( [id] => 1360496 [patent_doc_number] => 06587864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Galois field linear transformer' [patent_app_type] => B2 [patent_app_number] => 10/051533 [patent_app_country] => US [patent_app_date] => 2002-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3001 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587864.pdf [firstpage_image] =>[orig_patent_app_number] => 10051533 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/051533
Galois field linear transformer Jan 17, 2002 Issued
Array ( [id] => 6838062 [patent_doc_number] => 20030035402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Matched filter' [patent_app_type] => new [patent_app_number] => 10/031662 [patent_app_country] => US [patent_app_date] => 2002-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4538 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20030035402.pdf [firstpage_image] =>[orig_patent_app_number] => 10031662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/031662
Matched filter Jan 15, 2002 Abandoned
Array ( [id] => 6019491 [patent_doc_number] => 20020103843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Computationally efficient modular multiplication method and apparatus' [patent_app_type] => new [patent_app_number] => 10/043580 [patent_app_country] => US [patent_app_date] => 2002-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8101 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20020103843.pdf [firstpage_image] =>[orig_patent_app_number] => 10043580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/043580
Computationally efficient modular multiplication method and apparatus Jan 10, 2002 Abandoned
Array ( [id] => 789264 [patent_doc_number] => 06988114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Process and system for compressing and decompressing digital information and computer program product therefore' [patent_app_type] => utility [patent_app_number] => 10/044302 [patent_app_country] => US [patent_app_date] => 2002-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 7030 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988114.pdf [firstpage_image] =>[orig_patent_app_number] => 10044302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/044302
Process and system for compressing and decompressing digital information and computer program product therefore Jan 9, 2002 Issued
Array ( [id] => 6857528 [patent_doc_number] => 20030131029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Barrel shifter' [patent_app_type] => new [patent_app_number] => 10/043631 [patent_app_country] => US [patent_app_date] => 2002-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3314 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20030131029.pdf [firstpage_image] =>[orig_patent_app_number] => 10043631 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/043631
Barrel shifter Jan 7, 2002 Issued
Array ( [id] => 785839 [patent_doc_number] => 06993549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'System and method for performing gloating point operations involving extended exponents' [patent_app_type] => utility [patent_app_number] => 10/035581 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10425 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/993/06993549.pdf [firstpage_image] =>[orig_patent_app_number] => 10035581 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035581
System and method for performing gloating point operations involving extended exponents Dec 27, 2001 Issued
Array ( [id] => 764701 [patent_doc_number] => 07016928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-03-21 [patent_title] => 'Floating point status information testing circuit' [patent_app_type] => utility [patent_app_number] => 10/035741 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 10339 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/016/07016928.pdf [firstpage_image] =>[orig_patent_app_number] => 10035741 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035741
Floating point status information testing circuit Dec 27, 2001 Issued
Array ( [id] => 943370 [patent_doc_number] => 06970898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'System and method for forcing floating point status information to selected values' [patent_app_type] => utility [patent_app_number] => 10/035583 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 11276 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970898.pdf [firstpage_image] =>[orig_patent_app_number] => 10035583 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035583
System and method for forcing floating point status information to selected values Dec 27, 2001 Issued
Array ( [id] => 5910240 [patent_doc_number] => 20020143837 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Microarchitecture of an artihmetic unit' [patent_app_type] => new [patent_app_number] => 10/035033 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4996 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20020143837.pdf [firstpage_image] =>[orig_patent_app_number] => 10035033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035033
Microarchitecture of an arithmetic unit Dec 27, 2001 Issued
Array ( [id] => 937258 [patent_doc_number] => 06976050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-13 [patent_title] => 'System and method for extracting the high part of a floating point operand' [patent_app_type] => utility [patent_app_number] => 10/036133 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7711 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/976/06976050.pdf [firstpage_image] =>[orig_patent_app_number] => 10036133 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/036133
System and method for extracting the high part of a floating point operand Dec 27, 2001 Issued
Array ( [id] => 6423000 [patent_doc_number] => 20020184283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Floating point system with improved support of interval arithmetic' [patent_app_type] => new [patent_app_number] => 10/035582 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8373 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184283.pdf [firstpage_image] =>[orig_patent_app_number] => 10035582 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035582
Floating point system with improved support of interval arithmetic Dec 27, 2001 Issued
Array ( [id] => 6762804 [patent_doc_number] => 20030126166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Apparatus and method for graphically displaying a vector simultaneously along with the numerical values of its vector components' [patent_app_type] => new [patent_app_number] => 10/035113 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9126 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126166.pdf [firstpage_image] =>[orig_patent_app_number] => 10035113 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035113
Apparatus and method for graphically displaying a vector simultaneously along with the numerical values of its vector components Dec 26, 2001 Issued
Array ( [id] => 6762810 [patent_doc_number] => 20030126172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Self-timed digital processing circuits' [patent_app_type] => new [patent_app_number] => 10/033992 [patent_app_country] => US [patent_app_date] => 2001-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126172.pdf [firstpage_image] =>[orig_patent_app_number] => 10033992 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/033992
Self-timed digital processing circuits Dec 26, 2001 Issued
Array ( [id] => 6161089 [patent_doc_number] => 20020147755 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-10 [patent_title] => 'Method and apparatus for a fast comparison in redundant form arithmetic' [patent_app_type] => new [patent_app_number] => 10/032026 [patent_app_country] => US [patent_app_date] => 2001-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 38 [patent_no_of_words] => 10474 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0147/20020147755.pdf [firstpage_image] =>[orig_patent_app_number] => 10032026 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/032026
Method and apparatus for a fast comparison in redundant form arithmetic Dec 16, 2001 Issued
Array ( [id] => 787520 [patent_doc_number] => 06990506 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Integer cosine transform matrix for picture coding' [patent_app_type] => utility [patent_app_number] => 10/017722 [patent_app_country] => US [patent_app_date] => 2001-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2088 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/990/06990506.pdf [firstpage_image] =>[orig_patent_app_number] => 10017722 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017722
Integer cosine transform matrix for picture coding Dec 12, 2001 Issued
Array ( [id] => 978423 [patent_doc_number] => 06934733 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-23 [patent_title] => 'Optimization of adder based circuit architecture' [patent_app_type] => utility [patent_app_number] => 10/017802 [patent_app_country] => US [patent_app_date] => 2001-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934733.pdf [firstpage_image] =>[orig_patent_app_number] => 10017802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/017802
Optimization of adder based circuit architecture Dec 11, 2001 Issued
Array ( [id] => 6670247 [patent_doc_number] => 20030115231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Apparatus and method for simultaneously displaying a number along with its number of significant figures' [patent_app_type] => new [patent_app_number] => 10/013992 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8330 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20030115231.pdf [firstpage_image] =>[orig_patent_app_number] => 10013992 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013992
Apparatus and method for simultaneously displaying a number along with its number of significant figures Dec 10, 2001 Issued
Array ( [id] => 6906943 [patent_doc_number] => 20050102338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Signal processing' [patent_app_type] => utility [patent_app_number] => 10/433921 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2210 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20050102338.pdf [firstpage_image] =>[orig_patent_app_number] => 10433921 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/433921
Signal processing Dec 2, 2001 Abandoned
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