Richard L Schilling
Examiner (ID: 9849)
Most Active Art Unit | 1506 |
Art Unit(s) | 1506, 1752, 1302, 1795, 1715, 1113 |
Total Applications | 3259 |
Issued Applications | 2786 |
Pending Applications | 25 |
Abandoned Applications | 448 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6894496
[patent_doc_number] => 20010016862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-08-23
[patent_title] => 'Parallel random pattern generator circuit and scramble circuit and descramble circuit using the same'
[patent_app_type] => new
[patent_app_number] => 09/788563
[patent_app_country] => US
[patent_app_date] => 2001-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3147
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0016/20010016862.pdf
[firstpage_image] =>[orig_patent_app_number] => 09788563
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/788563 | Parallel random pattern generator circuit and scramble circuit and descramble circuit using the same | Feb 20, 2001 | Abandoned |
Array
(
[id] => 1169184
[patent_doc_number] => 06766342
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-20
[patent_title] => 'System and method for computing and unordered Hadamard transform'
[patent_app_type] => B2
[patent_app_number] => 09/785092
[patent_app_country] => US
[patent_app_date] => 2001-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6930
[patent_no_of_claims] => 46
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/766/06766342.pdf
[firstpage_image] =>[orig_patent_app_number] => 09785092
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/785092 | System and method for computing and unordered Hadamard transform | Feb 14, 2001 | Issued |
Array
(
[id] => 5910251
[patent_doc_number] => 20020143840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-10-03
[patent_title] => 'Method and apparatus for calculating a reciprocal'
[patent_app_type] => new
[patent_app_number] => 09/781951
[patent_app_country] => US
[patent_app_date] => 2001-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2747
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0143/20020143840.pdf
[firstpage_image] =>[orig_patent_app_number] => 09781951
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/781951 | Method and apparatus for calculating a reciprocal | Feb 13, 2001 | Issued |
Array
(
[id] => 6746463
[patent_doc_number] => 20030023646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-30
[patent_title] => 'Processor capable of executing packed shift operations'
[patent_app_type] => new
[patent_app_number] => 09/783816
[patent_app_country] => US
[patent_app_date] => 2001-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 22256
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20030023646.pdf
[firstpage_image] =>[orig_patent_app_number] => 09783816
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/783816 | Processor capable of executing packed shift operations | Feb 13, 2001 | Issued |
Array
(
[id] => 7638682
[patent_doc_number] => 06397238
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-05-28
[patent_title] => 'Method and apparatus for rounding in a multiplier'
[patent_app_type] => B2
[patent_app_number] => 09/782475
[patent_app_country] => US
[patent_app_date] => 2001-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 41
[patent_no_of_words] => 24607
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 4
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/397/06397238.pdf
[firstpage_image] =>[orig_patent_app_number] => 09782475
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/782475 | Method and apparatus for rounding in a multiplier | Feb 11, 2001 | Issued |
Array
(
[id] => 7635041
[patent_doc_number] => 06381625
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-04-30
[patent_title] => 'Method and apparatus for calculating a power of an operand'
[patent_app_type] => B2
[patent_app_number] => 09/782474
[patent_app_country] => US
[patent_app_date] => 2001-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 41
[patent_no_of_words] => 24618
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/381/06381625.pdf
[firstpage_image] =>[orig_patent_app_number] => 09782474
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/782474 | Method and apparatus for calculating a power of an operand | Feb 11, 2001 | Issued |
Array
(
[id] => 7066522
[patent_doc_number] => 20010044815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-22
[patent_title] => 'Logarithmic arithmetic unit avoiding division as far as predetermined arithmetic precision is guaranteed'
[patent_app_type] => new
[patent_app_number] => 09/775513
[patent_app_country] => US
[patent_app_date] => 2001-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 10753
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20010044815.pdf
[firstpage_image] =>[orig_patent_app_number] => 09775513
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/775513 | Logarithmic arithmetic unit avoiding division as far as predetermined arithmetic precision is guaranteed | Feb 4, 2001 | Issued |
Array
(
[id] => 6558612
[patent_doc_number] => 20020138531
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-26
[patent_title] => 'Systems and methods for a partial sum digital fir filter'
[patent_app_type] => new
[patent_app_number] => 09/777622
[patent_app_country] => US
[patent_app_date] => 2001-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7639
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20020138531.pdf
[firstpage_image] =>[orig_patent_app_number] => 09777622
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/777622 | Systems and methods for a partial sum digital fir filter | Feb 4, 2001 | Issued |
Array
(
[id] => 6901841
[patent_doc_number] => 20010023424
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-20
[patent_title] => 'Exponent unit of data processing system'
[patent_app_type] => new
[patent_app_number] => 09/777093
[patent_app_country] => US
[patent_app_date] => 2001-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4820
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20010023424.pdf
[firstpage_image] =>[orig_patent_app_number] => 09777093
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/777093 | Exponent unit of data processing system | Feb 4, 2001 | Issued |
Array
(
[id] => 6888016
[patent_doc_number] => 20010009010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-07-19
[patent_title] => 'Data split parallel shifter and parallel adder/subtractor'
[patent_app_type] => new-utility
[patent_app_number] => 09/774713
[patent_app_country] => US
[patent_app_date] => 2001-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11276
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0009/20010009010.pdf
[firstpage_image] =>[orig_patent_app_number] => 09774713
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/774713 | Data split parallel shifter and parallel adder/subtractor | Jan 31, 2001 | Issued |
Array
(
[id] => 1133627
[patent_doc_number] => 06792440
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-14
[patent_title] => 'Fir filter tap architecture for highly dense layout'
[patent_app_type] => B2
[patent_app_number] => 09/771753
[patent_app_country] => US
[patent_app_date] => 2001-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6357
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/792/06792440.pdf
[firstpage_image] =>[orig_patent_app_number] => 09771753
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/771753 | Fir filter tap architecture for highly dense layout | Jan 28, 2001 | Issued |
Array
(
[id] => 1105943
[patent_doc_number] => 06816876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-09
[patent_title] => 'Apparatus and method for modifying an M-sequence with arbitrary phase shift'
[patent_app_type] => B2
[patent_app_number] => 09/772581
[patent_app_country] => US
[patent_app_date] => 2001-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4126
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/816/06816876.pdf
[firstpage_image] =>[orig_patent_app_number] => 09772581
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/772581 | Apparatus and method for modifying an M-sequence with arbitrary phase shift | Jan 28, 2001 | Issued |
Array
(
[id] => 1030482
[patent_doc_number] => 06883011
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-19
[patent_title] => 'Parallel counter and a multiplication logic circuit'
[patent_app_type] => utility
[patent_app_number] => 09/769954
[patent_app_country] => US
[patent_app_date] => 2001-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 10073
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/883/06883011.pdf
[firstpage_image] =>[orig_patent_app_number] => 09769954
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/769954 | Parallel counter and a multiplication logic circuit | Jan 24, 2001 | Issued |
Array
(
[id] => 6348245
[patent_doc_number] => 20020035588
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-03-21
[patent_title] => 'Fast fourier transform method and inverse fast fourier transform method'
[patent_app_type] => new
[patent_app_number] => 09/770963
[patent_app_country] => US
[patent_app_date] => 2001-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3638
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0035/20020035588.pdf
[firstpage_image] =>[orig_patent_app_number] => 09770963
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/770963 | Fast Fourier transform method and inverse fast Fourier transform method | Jan 24, 2001 | Issued |
Array
(
[id] => 6880939
[patent_doc_number] => 20010032227
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-10-18
[patent_title] => 'Butterfly-processing element for efficient fast fourier transform method and apparatus'
[patent_app_type] => new
[patent_app_number] => 09/768812
[patent_app_country] => US
[patent_app_date] => 2001-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7731
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20010032227.pdf
[firstpage_image] =>[orig_patent_app_number] => 09768812
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/768812 | Butterfly-processing element for efficient fast fourier transform method and apparatus | Jan 23, 2001 | Issued |
Array
(
[id] => 6630517
[patent_doc_number] => 20020065861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-30
[patent_title] => 'Table lookup based phase calculator for high-speed communication using normalization of input operands'
[patent_app_type] => new
[patent_app_number] => 09/767913
[patent_app_country] => US
[patent_app_date] => 2001-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3809
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0065/20020065861.pdf
[firstpage_image] =>[orig_patent_app_number] => 09767913
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/767913 | Table lookup based phase calculator for high-speed communication using normalization of input operands | Jan 23, 2001 | Abandoned |
Array
(
[id] => 1225108
[patent_doc_number] => 06704759
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-09
[patent_title] => 'Method and apparatus for compression/decompression and filtering of a signal'
[patent_app_type] => B2
[patent_app_number] => 09/766042
[patent_app_country] => US
[patent_app_date] => 2001-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 4586
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/704/06704759.pdf
[firstpage_image] =>[orig_patent_app_number] => 09766042
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/766042 | Method and apparatus for compression/decompression and filtering of a signal | Jan 18, 2001 | Issued |
Array
(
[id] => 1489952
[patent_doc_number] => 06366935
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-04-02
[patent_title] => 'Combination laptop and pad computer'
[patent_app_type] => B2
[patent_app_number] => 09/765181
[patent_app_country] => US
[patent_app_date] => 2001-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3525
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/366/06366935.pdf
[firstpage_image] =>[orig_patent_app_number] => 09765181
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/765181 | Combination laptop and pad computer | Jan 17, 2001 | Issued |
Array
(
[id] => 1082902
[patent_doc_number] => 06836784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-28
[patent_title] => 'Efficient greatest common divisor algorithm using multiprecision arithmetic'
[patent_app_type] => B2
[patent_app_number] => 09/761213
[patent_app_country] => US
[patent_app_date] => 2001-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 7596
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/836/06836784.pdf
[firstpage_image] =>[orig_patent_app_number] => 09761213
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/761213 | Efficient greatest common divisor algorithm using multiprecision arithmetic | Jan 16, 2001 | Issued |
Array
(
[id] => 1176888
[patent_doc_number] => 06760737
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-06
[patent_title] => 'Spatial median filter'
[patent_app_type] => B2
[patent_app_number] => 09/760923
[patent_app_country] => US
[patent_app_date] => 2001-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3463
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/760/06760737.pdf
[firstpage_image] =>[orig_patent_app_number] => 09760923
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/760923 | Spatial median filter | Jan 15, 2001 | Issued |