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Richard L Schilling

Examiner (ID: 9849)

Most Active Art Unit
1506
Art Unit(s)
1506, 1752, 1302, 1795, 1715, 1113
Total Applications
3259
Issued Applications
2786
Pending Applications
25
Abandoned Applications
448

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7631643 [patent_doc_number] => 06665694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Sampling rate conversion' [patent_app_type] => B1 [patent_app_number] => 09/684041 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 4513 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665694.pdf [firstpage_image] =>[orig_patent_app_number] => 09684041 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/684041
Sampling rate conversion Oct 5, 2000 Issued
Array ( [id] => 1380503 [patent_doc_number] => 06574648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Dct arithmetic device' [patent_app_type] => B1 [patent_app_number] => 09/601803 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 14741 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574648.pdf [firstpage_image] =>[orig_patent_app_number] => 09601803 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/601803
Dct arithmetic device Oct 1, 2000 Issued
Array ( [id] => 1278909 [patent_doc_number] => 06654774 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Generation of sign extended shifted numerical values' [patent_app_type] => B1 [patent_app_number] => 09/670963 [patent_app_country] => US [patent_app_date] => 2000-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3238 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/654/06654774.pdf [firstpage_image] =>[orig_patent_app_number] => 09670963 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/670963
Generation of sign extended shifted numerical values Sep 25, 2000 Issued
Array ( [id] => 1323551 [patent_doc_number] => 06611854 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'System and method for distorting a signal' [patent_app_type] => B1 [patent_app_number] => 09/668701 [patent_app_country] => US [patent_app_date] => 2000-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1577 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611854.pdf [firstpage_image] =>[orig_patent_app_number] => 09668701 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/668701
System and method for distorting a signal Sep 21, 2000 Issued
Array ( [id] => 1380486 [patent_doc_number] => 06574647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Filter arrangement' [patent_app_type] => B1 [patent_app_number] => 09/582163 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3553 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574647.pdf [firstpage_image] =>[orig_patent_app_number] => 09582163 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/582163
Filter arrangement Sep 17, 2000 Issued
Array ( [id] => 1288595 [patent_doc_number] => 06647402 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-11 [patent_title] => 'Process for generating a serial number from random numbers' [patent_app_type] => B1 [patent_app_number] => 09/655151 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1259 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/647/06647402.pdf [firstpage_image] =>[orig_patent_app_number] => 09655151 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/655151
Process for generating a serial number from random numbers Sep 4, 2000 Issued
Array ( [id] => 1347009 [patent_doc_number] => 06598063 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Fast calculation of (A/B)K by a parallel floating-point processor' [patent_app_type] => B1 [patent_app_number] => 09/638442 [patent_app_country] => US [patent_app_date] => 2000-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3377 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598063.pdf [firstpage_image] =>[orig_patent_app_number] => 09638442 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/638442
Fast calculation of (A/B)K by a parallel floating-point processor Aug 13, 2000 Issued
Array ( [id] => 975088 [patent_doc_number] => 06938061 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-30 [patent_title] => 'Parallel counter and a multiplication logic circuit' [patent_app_type] => utility [patent_app_number] => 09/637532 [patent_app_country] => US [patent_app_date] => 2000-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5637 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/938/06938061.pdf [firstpage_image] =>[orig_patent_app_number] => 09637532 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/637532
Parallel counter and a multiplication logic circuit Aug 10, 2000 Issued
Array ( [id] => 1380471 [patent_doc_number] => 06574646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Electronic computing device for grading purposes' [patent_app_type] => B1 [patent_app_number] => 09/634982 [patent_app_country] => US [patent_app_date] => 2000-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2380 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574646.pdf [firstpage_image] =>[orig_patent_app_number] => 09634982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/634982
Electronic computing device for grading purposes Aug 8, 2000 Issued
Array ( [id] => 1557282 [patent_doc_number] => 06401106 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Methods and apparatus for performing correlation operations' [patent_app_type] => B1 [patent_app_number] => 09/633693 [patent_app_country] => US [patent_app_date] => 2000-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12234 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401106.pdf [firstpage_image] =>[orig_patent_app_number] => 09633693 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/633693
Methods and apparatus for performing correlation operations Aug 6, 2000 Issued
Array ( [id] => 1278926 [patent_doc_number] => 06654777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-25 [patent_title] => 'Single precision inverse square root generator' [patent_app_type] => B1 [patent_app_number] => 09/627221 [patent_app_country] => US [patent_app_date] => 2000-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5114 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/654/06654777.pdf [firstpage_image] =>[orig_patent_app_number] => 09627221 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/627221
Single precision inverse square root generator Jul 26, 2000 Issued
Array ( [id] => 1326452 [patent_doc_number] => 06609142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method of performing multiplication with accumulation in a Galois body' [patent_app_type] => B1 [patent_app_number] => 09/621891 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3230 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609142.pdf [firstpage_image] =>[orig_patent_app_number] => 09621891 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/621891
Method of performing multiplication with accumulation in a Galois body Jul 19, 2000 Issued
Array ( [id] => 1526315 [patent_doc_number] => 06353842 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Method for synthesizing linear finite state machines' [patent_app_type] => B1 [patent_app_number] => 09/620023 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 31 [patent_no_of_words] => 5071 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353842.pdf [firstpage_image] =>[orig_patent_app_number] => 09620023 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620023
Method for synthesizing linear finite state machines Jul 19, 2000 Issued
Array ( [id] => 1326462 [patent_doc_number] => 06609143 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method and apparatus for arithmetic operation' [patent_app_type] => B1 [patent_app_number] => 09/600622 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7280 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609143.pdf [firstpage_image] =>[orig_patent_app_number] => 09600622 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/600622
Method and apparatus for arithmetic operation Jul 19, 2000 Issued
Array ( [id] => 1364523 [patent_doc_number] => 06581087 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-17 [patent_title] => 'Floating point adder capable of rapid clip-code generation' [patent_app_type] => B1 [patent_app_number] => 09/620472 [patent_app_country] => US [patent_app_date] => 2000-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7381 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/581/06581087.pdf [firstpage_image] =>[orig_patent_app_number] => 09620472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/620472
Floating point adder capable of rapid clip-code generation Jul 19, 2000 Issued
Array ( [id] => 1284026 [patent_doc_number] => 06651079 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'High speed pipeline multiplier with virtual shift' [patent_app_type] => B1 [patent_app_number] => 09/618172 [patent_app_country] => US [patent_app_date] => 2000-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4132 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/651/06651079.pdf [firstpage_image] =>[orig_patent_app_number] => 09618172 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/618172
High speed pipeline multiplier with virtual shift Jul 17, 2000 Issued
Array ( [id] => 1356239 [patent_doc_number] => 06591284 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-08 [patent_title] => 'Method for performing a fast transform' [patent_app_type] => B1 [patent_app_number] => 09/613181 [patent_app_country] => US [patent_app_date] => 2000-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7610 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/591/06591284.pdf [firstpage_image] =>[orig_patent_app_number] => 09613181 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/613181
Method for performing a fast transform Jul 9, 2000 Issued
Array ( [id] => 1324293 [patent_doc_number] => 06615229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-02 [patent_title] => 'Dual threshold voltage complementary pass-transistor logic implementation of a low-power, partitioned multiplier' [patent_app_type] => B1 [patent_app_number] => 09/605543 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4881 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/615/06615229.pdf [firstpage_image] =>[orig_patent_app_number] => 09605543 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605543
Dual threshold voltage complementary pass-transistor logic implementation of a low-power, partitioned multiplier Jun 28, 2000 Issued
Array ( [id] => 7631640 [patent_doc_number] => 06665697 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Fourier analysis method and apparatus calculating the Fourier factor Wn utilizing trigonometric relations' [patent_app_type] => B1 [patent_app_number] => 09/605061 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3181 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665697.pdf [firstpage_image] =>[orig_patent_app_number] => 09605061 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605061
Fourier analysis method and apparatus calculating the Fourier factor Wn utilizing trigonometric relations Jun 27, 2000 Issued
Array ( [id] => 7611400 [patent_doc_number] => 06904442 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-06-07 [patent_title] => 'Method of implementing logic functions using a look-up-table' [patent_app_type] => utility [patent_app_number] => 09/605503 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/904/06904442.pdf [firstpage_image] =>[orig_patent_app_number] => 09605503 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605503
Method of implementing logic functions using a look-up-table Jun 27, 2000 Issued
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