Richard L Schilling

Array ( [id] => 1431009 [patent_doc_number] => 06523057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'High-speed digital accumulator with wide dynamic range' [patent_app_type] => B1 [patent_app_number] => 09/307083 [patent_app_country] => US [patent_app_date] => 1999-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1612 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/523/06523057.pdf [firstpage_image] =>[orig_patent_app_number] => 09307083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1601791 [patent_doc_number] => 06385635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Product sum operation device capable of carrying out fast operation' [patent_app_type] => B1 [patent_app_number] => 09/296653 [patent_app_country] => US [patent_app_date] => 1999-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6647 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385635.pdf [firstpage_image] =>[orig_patent_app_number] => 09296653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1532872 [patent_doc_number] => 06480871 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Algorithm (Method) and VLSI architecture for fast evaluation of trigonometric functions' [patent_app_type] => B1 [patent_app_number] => 09/287281 [patent_app_country] => US [patent_app_date] => 1999-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9575 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480871.pdf [firstpage_image] =>[orig_patent_app_number] => 09287281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1566891 [patent_doc_number] => 06438568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Method and apparatus for optimizing conversion of input data to output data' [patent_app_type] => B1 [patent_app_number] => 09/287162 [patent_app_country] => US [patent_app_date] => 1999-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5126 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438568.pdf [firstpage_image] =>[orig_patent_app_number] => 09287162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1164636 [patent_doc_number] => 06772183 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-03 [patent_title] => 'Device for converting input data to output data using plural converters' [patent_app_type] => B1 [patent_app_number] => 09/287163 [patent_app_country] => US [patent_app_date] => 1999-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5285 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772183.pdf [firstpage_image] =>[orig_patent_app_number] => 09287163 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1474672 [patent_doc_number] => 06408318 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Multiple stage decimation filter' [patent_app_type] => B1 [patent_app_number] => 09/286263 [patent_app_country] => US [patent_app_date] => 1999-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3811 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/408/06408318.pdf [firstpage_image] =>[orig_patent_app_number] => 09286263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1501325 [patent_doc_number] => 06405230 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Digital filter' [patent_app_type] => B1 [patent_app_number] => 09/285402 [patent_app_country] => US [patent_app_date] => 1999-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2287 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405230.pdf [firstpage_image] =>[orig_patent_app_number] => 09285402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423781 [patent_doc_number] => 06301596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Partial sum filter and method therefore' [patent_app_type] => 1 [patent_app_number] => 9/283693 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301596.pdf [firstpage_image] =>[orig_patent_app_number] => 283693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1489973 [patent_doc_number] => 06366943 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Adder circuit with the ability to detect zero when rounding' [patent_app_type] => B1 [patent_app_number] => 09/282401 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 4771 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366943.pdf [firstpage_image] =>[orig_patent_app_number] => 09282401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1557291 [patent_doc_number] => 06401108 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Floating point compare apparatus and methods therefor' [patent_app_type] => B1 [patent_app_number] => 09/282612 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3659 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401108.pdf [firstpage_image] =>[orig_patent_app_number] => 09282612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1489972 [patent_doc_number] => 06366942 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Method and apparatus for rounding floating point results in a digital processing system' [patent_app_type] => B1 [patent_app_number] => 09/281501 [patent_app_country] => US [patent_app_date] => 1999-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 9051 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366942.pdf [firstpage_image] =>[orig_patent_app_number] => 09281501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1549305 [patent_doc_number] => 06374278 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-16 [patent_title] => 'Method and apparatus for the generation of statistically random numbers' [patent_app_type] => B1 [patent_app_number] => 09/276366 [patent_app_country] => US [patent_app_date] => 1999-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2948 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/374/06374278.pdf [firstpage_image] =>[orig_patent_app_number] => 09276366 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7638685 [patent_doc_number] => 06397235 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Data processing device and method of computing the costine transform of a matrix' [patent_app_type] => B1 [patent_app_number] => 09/270438 [patent_app_country] => US [patent_app_date] => 1999-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6872 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397235.pdf [firstpage_image] =>[orig_patent_app_number] => 09270438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1592016 [patent_doc_number] => 06360238 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Leading zero/one anticipator having an integrated sign selector' [patent_app_type] => B1 [patent_app_number] => 09/270469 [patent_app_country] => US [patent_app_date] => 1999-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4136 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360238.pdf [firstpage_image] =>[orig_patent_app_number] => 09270469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1557064 [patent_doc_number] => 06349317 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-19 [patent_title] => 'Efficient radix-4 CORDIC vector rotators and computers of sine and cosine functions' [patent_app_type] => B1 [patent_app_number] => 09/267762 [patent_app_country] => US [patent_app_date] => 1999-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5231 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 312 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/349/06349317.pdf [firstpage_image] =>[orig_patent_app_number] => 09267762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422842 [patent_doc_number] => 06311202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Hardware efficient fast hadamard transform engine' [patent_app_type] => 1 [patent_app_number] => 9/267451 [patent_app_country] => US [patent_app_date] => 1999-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5634 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/311/06311202.pdf [firstpage_image] =>[orig_patent_app_number] => 267451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1489959 [patent_doc_number] => 06366937 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'System and method for performing a fast fourier transform using a matrix-vector multiply instruction' [patent_app_type] => B1 [patent_app_number] => 09/267899 [patent_app_country] => US [patent_app_date] => 1999-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4591 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366937.pdf [firstpage_image] =>[orig_patent_app_number] => 09267899 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4423774 [patent_doc_number] => 06301595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Digital filter' [patent_app_type] => 1 [patent_app_number] => 9/265421 [patent_app_country] => US [patent_app_date] => 1999-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2689 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/301/06301595.pdf [firstpage_image] =>[orig_patent_app_number] => 265421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1497644 [patent_doc_number] => 06343304 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Apparatus with selective fixed-coefficient filter for performing recursive discrete cosine transforms' [patent_app_type] => B1 [patent_app_number] => 09/265102 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6430 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/343/06343304.pdf [firstpage_image] =>[orig_patent_app_number] => 09265102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4289483 [patent_doc_number] => 06308191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Programmable processor circuit with a reconfigurable memory for realizing a digital filter' [patent_app_type] => 1 [patent_app_number] => 9/264912 [patent_app_country] => US [patent_app_date] => 1999-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2251 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/308/06308191.pdf [firstpage_image] =>[orig_patent_app_number] => 264912 [rel_patent_id] =>[rel_patent_doc_number] =>)