Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5463195 [patent_doc_number] => 20090323395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/409958 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8296 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20090323395.pdf [firstpage_image] =>[orig_patent_app_number] => 12409958 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409958
Semiconductor storage device Mar 23, 2009 Issued
Array ( [id] => 4522281 [patent_doc_number] => 07911859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Delay line and memory control circuit utilizing the delay line' [patent_app_type] => utility [patent_app_number] => 12/409532 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2801 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911859.pdf [firstpage_image] =>[orig_patent_app_number] => 12409532 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409532
Delay line and memory control circuit utilizing the delay line Mar 23, 2009 Issued
Array ( [id] => 4544412 [patent_doc_number] => 07889559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-15 [patent_title] => 'Circuit for generating a voltage and a non-volatile memory device having the same' [patent_app_type] => utility [patent_app_number] => 12/410414 [patent_app_country] => US [patent_app_date] => 2009-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4750 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/889/07889559.pdf [firstpage_image] =>[orig_patent_app_number] => 12410414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/410414
Circuit for generating a voltage and a non-volatile memory device having the same Mar 23, 2009 Issued
Array ( [id] => 4640722 [patent_doc_number] => 08018752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Configurable bandwidth memory devices and methods' [patent_app_type] => utility [patent_app_number] => 12/408906 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3859 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018752.pdf [firstpage_image] =>[orig_patent_app_number] => 12408906 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408906
Configurable bandwidth memory devices and methods Mar 22, 2009 Issued
Array ( [id] => 6289622 [patent_doc_number] => 20100238729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'NON-VOLATILE MEMORY WITH REDUCED LEAKAGE CURRENT FOR UNSELECTED BLOCKS AND METHOD FOR OPERATING SAME' [patent_app_type] => utility [patent_app_number] => 12/409020 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13022 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20100238729.pdf [firstpage_image] =>[orig_patent_app_number] => 12409020 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409020
Non-volatile memory with reduced leakage current for unselected blocks and method for operating same Mar 22, 2009 Issued
Array ( [id] => 4464983 [patent_doc_number] => 07881096 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Asymmetric write current compensation' [patent_app_type] => utility [patent_app_number] => 12/408996 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6015 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881096.pdf [firstpage_image] =>[orig_patent_app_number] => 12408996 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408996
Asymmetric write current compensation Mar 22, 2009 Issued
Array ( [id] => 6530121 [patent_doc_number] => 20100124096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'ELECTRIC ELEMENT, SWITCHING ELEMENT, MEMORY ELEMENT, SWITCHING METHOD AND MEMORY METHOD' [patent_app_type] => utility [patent_app_number] => 12/408072 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3778 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20100124096.pdf [firstpage_image] =>[orig_patent_app_number] => 12408072 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408072
Electric element, switching element, memory element, switching method and memory method Mar 19, 2009 Issued
Array ( [id] => 4548816 [patent_doc_number] => 07876626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Semiconductor memory device and semiconductor memory system' [patent_app_type] => utility [patent_app_number] => 12/408232 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 8121 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/876/07876626.pdf [firstpage_image] =>[orig_patent_app_number] => 12408232 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408232
Semiconductor memory device and semiconductor memory system Mar 19, 2009 Issued
Array ( [id] => 4577350 [patent_doc_number] => 07848170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/407938 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 9771 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/848/07848170.pdf [firstpage_image] =>[orig_patent_app_number] => 12407938 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407938
Nonvolatile semiconductor memory Mar 19, 2009 Issued
Array ( [id] => 4465040 [patent_doc_number] => 07881120 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/408260 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/881/07881120.pdf [firstpage_image] =>[orig_patent_app_number] => 12408260 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/408260
Semiconductor memory device Mar 19, 2009 Issued
Array ( [id] => 4540888 [patent_doc_number] => 07872903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-18 [patent_title] => 'Volatile memory elements with soft error upset immunity' [patent_app_type] => utility [patent_app_number] => 12/407762 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9923 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872903.pdf [firstpage_image] =>[orig_patent_app_number] => 12407762 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407762
Volatile memory elements with soft error upset immunity Mar 18, 2009 Issued
Array ( [id] => 6628155 [patent_doc_number] => 20100100662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'ACCESSING APPARATUS AND METHOD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/407658 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20100100662.pdf [firstpage_image] =>[orig_patent_app_number] => 12407658 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407658
ACCESSING APPARATUS AND METHOD USING THE SAME Mar 18, 2009 Abandoned
Array ( [id] => 5402674 [patent_doc_number] => 20090237988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'MAGNETIC MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/407156 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5321 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20090237988.pdf [firstpage_image] =>[orig_patent_app_number] => 12407156 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407156
Magnetic memory device Mar 18, 2009 Issued
Array ( [id] => 4577165 [patent_doc_number] => 07848146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Partial local self-boosting of a memory cell channel' [patent_app_type] => utility [patent_app_number] => 12/407228 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 28 [patent_no_of_words] => 7082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/848/07848146.pdf [firstpage_image] =>[orig_patent_app_number] => 12407228 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407228
Partial local self-boosting of a memory cell channel Mar 18, 2009 Issued
Array ( [id] => 4581722 [patent_doc_number] => 07859902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Three dimensional stacked nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/407094 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 28 [patent_no_of_words] => 10337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859902.pdf [firstpage_image] =>[orig_patent_app_number] => 12407094 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407094
Three dimensional stacked nonvolatile semiconductor memory Mar 18, 2009 Issued
Array ( [id] => 4447801 [patent_doc_number] => 07864620 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-04 [patent_title] => 'Partially reconfigurable memory cell arrays' [patent_app_type] => utility [patent_app_number] => 12/407750 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6915 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/864/07864620.pdf [firstpage_image] =>[orig_patent_app_number] => 12407750 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407750
Partially reconfigurable memory cell arrays Mar 18, 2009 Issued
Array ( [id] => 6276786 [patent_doc_number] => 20100118638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS HAVING DECREASED LEAKAGE CURRENT' [patent_app_type] => utility [patent_app_number] => 12/407326 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2610 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20100118638.pdf [firstpage_image] =>[orig_patent_app_number] => 12407326 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407326
Semiconductor memory apparatus having decreased leakage current Mar 18, 2009 Issued
Array ( [id] => 4590472 [patent_doc_number] => 07852676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Three dimensional stacked nonvolatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 12/407494 [patent_app_country] => US [patent_app_date] => 2009-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 10993 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852676.pdf [firstpage_image] =>[orig_patent_app_number] => 12407494 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/407494
Three dimensional stacked nonvolatile semiconductor memory Mar 18, 2009 Issued
Array ( [id] => 4480812 [patent_doc_number] => 07869259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Resistance change memory, and data write and erase methods thereof' [patent_app_type] => utility [patent_app_number] => 12/406898 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 4380 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/869/07869259.pdf [firstpage_image] =>[orig_patent_app_number] => 12406898 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406898
Resistance change memory, and data write and erase methods thereof Mar 17, 2009 Issued
Array ( [id] => 4590495 [patent_doc_number] => 07852685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/406552 [patent_app_country] => US [patent_app_date] => 2009-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4249 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852685.pdf [firstpage_image] =>[orig_patent_app_number] => 12406552 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/406552
Semiconductor memory device Mar 17, 2009 Issued
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