Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 279031 [patent_doc_number] => 07558113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Memory system and data writing method' [patent_app_type] => utility [patent_app_number] => 11/846334 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9012 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558113.pdf [firstpage_image] =>[orig_patent_app_number] => 11846334 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/846334
Memory system and data writing method Aug 27, 2007 Issued
Array ( [id] => 261034 [patent_doc_number] => 07573765 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/846026 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8890 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573765.pdf [firstpage_image] =>[orig_patent_app_number] => 11846026 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/846026
Semiconductor memory device Aug 27, 2007 Issued
Array ( [id] => 5321707 [patent_doc_number] => 20090059697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'METHOD AND APPARATUS FOR IMPLEMENTING SRAM CELL WRITE PERFORMANCE EVALUATION' [patent_app_type] => utility [patent_app_number] => 11/845866 [patent_app_country] => US [patent_app_date] => 2007-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3010 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059697.pdf [firstpage_image] =>[orig_patent_app_number] => 11845866 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845866
Method for implementing SRAM cell write performance evaluation Aug 27, 2007 Issued
Array ( [id] => 114176 [patent_doc_number] => 07719887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'CMOS storage devices configurable in high performance mode or radiation tolerant mode' [patent_app_type] => utility [patent_app_number] => 11/845170 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 5388 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719887.pdf [firstpage_image] =>[orig_patent_app_number] => 11845170 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845170
CMOS storage devices configurable in high performance mode or radiation tolerant mode Aug 26, 2007 Issued
Array ( [id] => 5321682 [patent_doc_number] => 20090059672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'SELF-TIMED INTEGRATING DIFFERENTIAL CURRENT SENSE AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 11/845534 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4581 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059672.pdf [firstpage_image] =>[orig_patent_app_number] => 11845534 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845534
Self-timed integrating differential current sense amplifier Aug 26, 2007 Issued
Array ( [id] => 5321715 [patent_doc_number] => 20090059705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'SRAM HAVING ACTIVE WRITE ASSIST FOR IMPROVED OPERATIONAL MARGINS' [patent_app_type] => utility [patent_app_number] => 11/845386 [patent_app_country] => US [patent_app_date] => 2007-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7255 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20090059705.pdf [firstpage_image] =>[orig_patent_app_number] => 11845386 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/845386
SRAM having active write assist for improved operational margins Aug 26, 2007 Issued
Array ( [id] => 4770305 [patent_doc_number] => 20080055963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'PHASE CHANGE RANDOM ACCESS MEMORY AND RELATED METHODS OF OPERATION' [patent_app_type] => utility [patent_app_number] => 11/844512 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6114 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20080055963.pdf [firstpage_image] =>[orig_patent_app_number] => 11844512 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844512
Phase change random access memory and related methods of operation Aug 23, 2007 Issued
Array ( [id] => 5164395 [patent_doc_number] => 20070285979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'DYNAMIC RAM STORAGE TECHNIQUES' [patent_app_type] => utility [patent_app_number] => 11/844916 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4750 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20070285979.pdf [firstpage_image] =>[orig_patent_app_number] => 11844916 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844916
Dynamic RAM storage techniques Aug 23, 2007 Issued
Array ( [id] => 4691979 [patent_doc_number] => 20080084749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'CIRCUIT AND METHOD GENERATING PROGRAM VOLTAGE FOR NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/844514 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3334 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084749.pdf [firstpage_image] =>[orig_patent_app_number] => 11844514 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844514
Circuit and method generating program voltage for non-volatile memory device Aug 23, 2007 Issued
Array ( [id] => 312100 [patent_doc_number] => 07529136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-05 [patent_title] => 'Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations' [patent_app_type] => utility [patent_app_number] => 11/844480 [patent_app_country] => US [patent_app_date] => 2007-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5295 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/529/07529136.pdf [firstpage_image] =>[orig_patent_app_number] => 11844480 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844480
Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations Aug 23, 2007 Issued
Array ( [id] => 153822 [patent_doc_number] => 07684241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Flash memory devices having multi-page copyback functionality and related block replacement methods' [patent_app_type] => utility [patent_app_number] => 11/843902 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6232 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/684/07684241.pdf [firstpage_image] =>[orig_patent_app_number] => 11843902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843902
Flash memory devices having multi-page copyback functionality and related block replacement methods Aug 22, 2007 Issued
Array ( [id] => 4732530 [patent_doc_number] => 20080049509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/844096 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20080049509.pdf [firstpage_image] =>[orig_patent_app_number] => 11844096 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844096
Nonvolatile semiconductor memory device and control method thereof Aug 22, 2007 Issued
Array ( [id] => 279057 [patent_doc_number] => 07558139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 11/844098 [patent_app_country] => US [patent_app_date] => 2007-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 10691 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558139.pdf [firstpage_image] =>[orig_patent_app_number] => 11844098 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/844098
Semiconductor memory device Aug 22, 2007 Issued
Array ( [id] => 5335756 [patent_doc_number] => 20090052220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'ONE-TIME PROGRAMMABLE NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/843404 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20090052220.pdf [firstpage_image] =>[orig_patent_app_number] => 11843404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843404
One-time programmable non-volatile memory Aug 21, 2007 Issued
Array ( [id] => 124191 [patent_doc_number] => 07710754 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Method of simple chip select for memory subsystems' [patent_app_type] => utility [patent_app_number] => 11/843558 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 2407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/710/07710754.pdf [firstpage_image] =>[orig_patent_app_number] => 11843558 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843558
Method of simple chip select for memory subsystems Aug 21, 2007 Issued
Array ( [id] => 585751 [patent_doc_number] => 07460400 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-02 [patent_title] => 'Nonvolatile memory utilizing MIS memory transistors with bit mask function' [patent_app_type] => utility [patent_app_number] => 11/843190 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9842 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/460/07460400.pdf [firstpage_image] =>[orig_patent_app_number] => 11843190 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843190
Nonvolatile memory utilizing MIS memory transistors with bit mask function Aug 21, 2007 Issued
Array ( [id] => 581577 [patent_doc_number] => 07463519 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-09 [patent_title] => 'MIS-transistor-based nonvolatile memory device for authentication' [patent_app_type] => utility [patent_app_number] => 11/843020 [patent_app_country] => US [patent_app_date] => 2007-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8607 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/463/07463519.pdf [firstpage_image] =>[orig_patent_app_number] => 11843020 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/843020
MIS-transistor-based nonvolatile memory device for authentication Aug 21, 2007 Issued
Array ( [id] => 4732553 [patent_doc_number] => 20080049532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND REFRESH CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/842662 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 11976 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20080049532.pdf [firstpage_image] =>[orig_patent_app_number] => 11842662 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/842662
Semiconductor memory device and refresh control method thereof Aug 20, 2007 Issued
Array ( [id] => 178990 [patent_doc_number] => 07656701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Method for programming a multilevel phase change memory device' [patent_app_type] => utility [patent_app_number] => 11/894869 [patent_app_country] => US [patent_app_date] => 2007-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4769 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656701.pdf [firstpage_image] =>[orig_patent_app_number] => 11894869 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/894869
Method for programming a multilevel phase change memory device Aug 20, 2007 Issued
Array ( [id] => 192015 [patent_doc_number] => 07643334 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-01-05 [patent_title] => 'High-speed controller for phase-change memory peripheral device' [patent_app_type] => utility [patent_app_number] => 11/836264 [patent_app_country] => US [patent_app_date] => 2007-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 9851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/643/07643334.pdf [firstpage_image] =>[orig_patent_app_number] => 11836264 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/836264
High-speed controller for phase-change memory peripheral device Aug 8, 2007 Issued
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