
Richard M. Lorence
Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )
| Most Active Art Unit | 3502 |
| Art Unit(s) | 3502, 3617, 3622, 0, 3655, 3656, 3681 |
| Total Applications | 3174 |
| Issued Applications | 2769 |
| Pending Applications | 79 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5124731
[patent_doc_number] => 20070237002
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-10-11
[patent_title] => 'NON-VOLATILE SEMICONDUCTOR MEMORY AND METHOD FOR CONTROLLING A NON-VOLATILE SEMICONDUCTOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 11/763204
[patent_app_country] => US
[patent_app_date] => 2007-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 57
[patent_figures_cnt] => 57
[patent_no_of_words] => 18192
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0237/20070237002.pdf
[firstpage_image] =>[orig_patent_app_number] => 11763204
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/763204 | Non-volatile semiconductor memory and method for controlling a non-volatile semiconductor memory | Jun 13, 2007 | Issued |
Array
(
[id] => 85821
[patent_doc_number] => 07742351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-22
[patent_title] => 'Semiconductor device and electronic device'
[patent_app_type] => utility
[patent_app_number] => 11/762146
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 47
[patent_no_of_words] => 23914
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/742/07742351.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762146
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762146 | Semiconductor device and electronic device | Jun 12, 2007 | Issued |
Array
(
[id] => 323703
[patent_doc_number] => 07518944
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Memory and control unit'
[patent_app_type] => utility
[patent_app_number] => 11/762566
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 7384
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/518/07518944.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762566
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762566 | Memory and control unit | Jun 12, 2007 | Issued |
Array
(
[id] => 327696
[patent_doc_number] => 07515477
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-07
[patent_title] => 'Non-volatile memory device and method of programming the same'
[patent_app_type] => utility
[patent_app_number] => 11/751586
[patent_app_country] => US
[patent_app_date] => 2007-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4117
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/515/07515477.pdf
[firstpage_image] =>[orig_patent_app_number] => 11751586
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751586 | Non-volatile memory device and method of programming the same | May 20, 2007 | Issued |
Array
(
[id] => 4898083
[patent_doc_number] => 20080117696
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-05-22
[patent_title] => 'METHOD FOR REPAIRING DEFECTS IN MEMORY AND RELATED MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 11/751046
[patent_app_country] => US
[patent_app_date] => 2007-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1390
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20080117696.pdf
[firstpage_image] =>[orig_patent_app_number] => 11751046
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751046 | METHOD FOR REPAIRING DEFECTS IN MEMORY AND RELATED MEMORY SYSTEM | May 20, 2007 | Abandoned |
Array
(
[id] => 323684
[patent_doc_number] => 07518925
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 11/751082
[patent_app_country] => US
[patent_app_date] => 2007-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4735
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/518/07518925.pdf
[firstpage_image] =>[orig_patent_app_number] => 11751082
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751082 | Nonvolatile semiconductor memory | May 20, 2007 | Issued |
Array
(
[id] => 4750916
[patent_doc_number] => 20080158987
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'NON-VOLATILE MEMORY DEVICE AND DATA READ METHOD AND PROGRAM VERIFY METHOD OF NON-VOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 11/751016
[patent_app_country] => US
[patent_app_date] => 2007-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3336
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20080158987.pdf
[firstpage_image] =>[orig_patent_app_number] => 11751016
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751016 | Non-volatile memory device and data read method and program verify method of non-volatile memory device | May 18, 2007 | Issued |
Array
(
[id] => 4763852
[patent_doc_number] => 20080175063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'NAND FLASH MEMORY DEVICE AND METHOD OF IMPROVING CHARACTERISTIC OF A CELL IN THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/751014
[patent_app_country] => US
[patent_app_date] => 2007-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5849
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20080175063.pdf
[firstpage_image] =>[orig_patent_app_number] => 11751014
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/751014 | NAND flash memory device and method of improving characteristic of a cell in the same | May 18, 2007 | Issued |
Array
(
[id] => 902531
[patent_doc_number] => 07339819
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-03-04
[patent_title] => 'Spin based memory coupled to CMOS amplifier'
[patent_app_type] => utility
[patent_app_number] => 11/745167
[patent_app_country] => US
[patent_app_date] => 2007-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 9969
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/339/07339819.pdf
[firstpage_image] =>[orig_patent_app_number] => 11745167
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/745167 | Spin based memory coupled to CMOS amplifier | May 6, 2007 | Issued |
Array
(
[id] => 5003701
[patent_doc_number] => 20070201268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-30
[patent_title] => 'Spin Based Magnetic Sensor'
[patent_app_type] => utility
[patent_app_number] => 11/741984
[patent_app_country] => US
[patent_app_date] => 2007-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9910
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0201/20070201268.pdf
[firstpage_image] =>[orig_patent_app_number] => 11741984
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741984 | Spin based magnetic sensor | Apr 29, 2007 | Issued |
Array
(
[id] => 229827
[patent_doc_number] => 07602644
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-13
[patent_title] => 'Memory devices with page buffer having dual registers and method of using the same'
[patent_app_type] => utility
[patent_app_number] => 11/734102
[patent_app_country] => US
[patent_app_date] => 2007-04-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 29
[patent_no_of_words] => 8041
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/602/07602644.pdf
[firstpage_image] =>[orig_patent_app_number] => 11734102
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/734102 | Memory devices with page buffer having dual registers and method of using the same | Apr 10, 2007 | Issued |
Array
(
[id] => 154483
[patent_doc_number] => 07679984
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-16
[patent_title] => 'Configurable memory data path'
[patent_app_type] => utility
[patent_app_number] => 11/695676
[patent_app_country] => US
[patent_app_date] => 2007-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4635
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/679/07679984.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695676
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695676 | Configurable memory data path | Apr 2, 2007 | Issued |
Array
(
[id] => 360683
[patent_doc_number] => 07486551
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-02-03
[patent_title] => 'Method and system for providing domain wall assisted switching of magnetic elements and magnetic memories using such magnetic elements'
[patent_app_type] => utility
[patent_app_number] => 11/695614
[patent_app_country] => US
[patent_app_date] => 2007-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 9411
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/486/07486551.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695614
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695614 | Method and system for providing domain wall assisted switching of magnetic elements and magnetic memories using such magnetic elements | Apr 2, 2007 | Issued |
Array
(
[id] => 170854
[patent_doc_number] => 07668018
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Electronic device including a nonvolatile memory array and methods of using the same'
[patent_app_type] => utility
[patent_app_number] => 11/695722
[patent_app_country] => US
[patent_app_date] => 2007-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 8820
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/668/07668018.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695722
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695722 | Electronic device including a nonvolatile memory array and methods of using the same | Apr 2, 2007 | Issued |
Array
(
[id] => 811803
[patent_doc_number] => 07417900
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-26
[patent_title] => 'Method and system for refreshing a memory device during reading thereof'
[patent_app_type] => utility
[patent_app_number] => 11/695552
[patent_app_country] => US
[patent_app_date] => 2007-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 9206
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/417/07417900.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695552
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695552 | Method and system for refreshing a memory device during reading thereof | Apr 1, 2007 | Issued |
Array
(
[id] => 364842
[patent_doc_number] => 07483303
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-27
[patent_title] => 'Flash memory device with improved program performance and smart card including the same'
[patent_app_type] => utility
[patent_app_number] => 11/695132
[patent_app_country] => US
[patent_app_date] => 2007-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3260
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/483/07483303.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695132
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695132 | Flash memory device with improved program performance and smart card including the same | Apr 1, 2007 | Issued |
Array
(
[id] => 919746
[patent_doc_number] => 07324387
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-01-29
[patent_title] => 'Low power high density random access memory flash cells and arrays'
[patent_app_type] => utility
[patent_app_number] => 11/732323
[patent_app_country] => US
[patent_app_date] => 2007-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2474
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 15
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/324/07324387.pdf
[firstpage_image] =>[orig_patent_app_number] => 11732323
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/732323 | Low power high density random access memory flash cells and arrays | Apr 1, 2007 | Issued |
Array
(
[id] => 824485
[patent_doc_number] => 07405960
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-29
[patent_title] => 'Semiconductor memory device and method for biasing dummy line therefor'
[patent_app_type] => utility
[patent_app_number] => 11/695232
[patent_app_country] => US
[patent_app_date] => 2007-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 4460
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/405/07405960.pdf
[firstpage_image] =>[orig_patent_app_number] => 11695232
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/695232 | Semiconductor memory device and method for biasing dummy line therefor | Apr 1, 2007 | Issued |
Array
(
[id] => 4871931
[patent_doc_number] => 20080198665
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-21
[patent_title] => 'VARIABLE INITIAL PROGRAM VOLTAGE MAGNITUDE FOR NON-VOLATILE STORAGE'
[patent_app_type] => utility
[patent_app_number] => 11/694990
[patent_app_country] => US
[patent_app_date] => 2007-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 14615
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0198/20080198665.pdf
[firstpage_image] =>[orig_patent_app_number] => 11694990
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/694990 | Variable initial program voltage magnitude for non-volatile storage | Mar 30, 2007 | Issued |
Array
(
[id] => 7596652
[patent_doc_number] => 07619930
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-17
[patent_title] => 'Dynamic verify based on threshold voltage distribution'
[patent_app_type] => utility
[patent_app_number] => 11/694992
[patent_app_country] => US
[patent_app_date] => 2007-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 24
[patent_no_of_words] => 14467
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/619/07619930.pdf
[firstpage_image] =>[orig_patent_app_number] => 11694992
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/694992 | Dynamic verify based on threshold voltage distribution | Mar 30, 2007 | Issued |