Richard M. Lorence

Array ( [id] => 5074164 [patent_doc_number] => 20070014139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'COMPARE CIRCUIT FOR A CONTENT ADDRESSABLE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 11/534873 [patent_app_country] => US [patent_app_date] => 2006-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9611 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0014/20070014139.pdf [firstpage_image] =>[orig_patent_app_number] => 11534873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4948195 [patent_doc_number] => 20080304321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-11 [patent_title] => 'Serial Flash Memory Device and Precharging Method Thereof' [patent_app_type] => utility [patent_app_number] => 12/065456 [patent_app_country] => US [patent_app_date] => 2006-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4717 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0304/20080304321.pdf [firstpage_image] =>[orig_patent_app_number] => 12065456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7692948 [patent_doc_number] => 20070016738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Nonvolatile Semiconductor Memory' [patent_app_type] => utility [patent_app_number] => 11/530551 [patent_app_country] => US [patent_app_date] => 2006-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 11618 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20070016738.pdf [firstpage_image] =>[orig_patent_app_number] => 11530551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 206337 [patent_doc_number] => 07630234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 12/066926 [patent_app_country] => US [patent_app_date] => 2006-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 50 [patent_no_of_words] => 12536 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/630/07630234.pdf [firstpage_image] =>[orig_patent_app_number] => 12066926 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4851047 [patent_doc_number] => 20080316789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Random Access Electrically Programmable E-Fuse Rom' [patent_app_type] => utility [patent_app_number] => 12/065202 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5926 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0316/20080316789.pdf [firstpage_image] =>[orig_patent_app_number] => 12065202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5147102 [patent_doc_number] => 20070047156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Memory Access' [patent_app_type] => utility [patent_app_number] => 11/462304 [patent_app_country] => US [patent_app_date] => 2006-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13230 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20070047156.pdf [firstpage_image] =>[orig_patent_app_number] => 11462304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 924000 [patent_doc_number] => 07319615 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-01-15 [patent_title] => 'Ramp gate erase for dual bit flash memory' [patent_app_type] => utility [patent_app_number] => 11/497597 [patent_app_country] => US [patent_app_date] => 2006-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 14658 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/319/07319615.pdf [firstpage_image] =>[orig_patent_app_number] => 11497597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 402866 [patent_doc_number] => 07292493 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-11-06 [patent_title] => 'Semiconductor device with electrically broken fuse and its manufacture method' [patent_app_type] => utility [patent_app_number] => 11/495768 [patent_app_country] => US [patent_app_date] => 2006-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6238 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/292/07292493.pdf [firstpage_image] =>[orig_patent_app_number] => 11495768 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5203693 [patent_doc_number] => 20070025172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Memory' [patent_app_type] => utility [patent_app_number] => 11/494748 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 26936 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20070025172.pdf [firstpage_image] =>[orig_patent_app_number] => 11494748 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5050191 [patent_doc_number] => 20070030735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Page buffer circuit and method for multi-level NAND programmable memories' [patent_app_type] => utility [patent_app_number] => 11/495874 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17590 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20070030735.pdf [firstpage_image] =>[orig_patent_app_number] => 11495874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5050188 [patent_doc_number] => 20070030732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Double page programming system and method' [patent_app_type] => utility [patent_app_number] => 11/495876 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 20545 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20070030732.pdf [firstpage_image] =>[orig_patent_app_number] => 11495876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 874816 [patent_doc_number] => 07362616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-22 [patent_title] => 'NAND flash memory with erase verify based on shorter evaluation time' [patent_app_type] => utility [patent_app_number] => 11/495886 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5556 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/362/07362616.pdf [firstpage_image] =>[orig_patent_app_number] => 11495886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5203675 [patent_doc_number] => 20070025154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Semiconductor device and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 11/494872 [patent_app_country] => US [patent_app_date] => 2006-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12238 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20070025154.pdf [firstpage_image] =>[orig_patent_app_number] => 11494872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5603944 [patent_doc_number] => 20060294291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-28 [patent_title] => 'Data retention kill function' [patent_app_type] => utility [patent_app_number] => 11/490215 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20060294291.pdf [firstpage_image] =>[orig_patent_app_number] => 11490215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 854711 [patent_doc_number] => 07379337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-27 [patent_title] => 'Flash memory device and read operation method thereof' [patent_app_type] => utility [patent_app_number] => 11/488836 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6618 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/379/07379337.pdf [firstpage_image] =>[orig_patent_app_number] => 11488836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 588297 [patent_doc_number] => 07457152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-25 [patent_title] => 'Non-volatile memory devices and systems including phase-change one-time-programmable (OTP) memory cells and related methods' [patent_app_type] => utility [patent_app_number] => 11/488010 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 6927 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/457/07457152.pdf [firstpage_image] =>[orig_patent_app_number] => 11488010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5061648 [patent_doc_number] => 20070223287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Pipe latch circuit for increasing data output speed, a semiconductor memory device with the pipe latch circuit and data output operation method of the same' [patent_app_type] => utility [patent_app_number] => 11/488014 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10855 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20070223287.pdf [firstpage_image] =>[orig_patent_app_number] => 11488014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5562799 [patent_doc_number] => 20090135651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-28 [patent_title] => 'CURRENT OR VOLTAGE MEASUREMENT CIRCUIT, SENSE CIRCUIT, SEMICONDUCTOR NON-VOLATILE MEMORY, AND DIFFERENTIAL AMPLIFIER' [patent_app_type] => utility [patent_app_number] => 12/064712 [patent_app_country] => US [patent_app_date] => 2006-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 13356 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20090135651.pdf [firstpage_image] =>[orig_patent_app_number] => 12064712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 197212 [patent_doc_number] => 07636252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Nonvolatile memory with a unified cell structure' [patent_app_type] => utility [patent_app_number] => 11/483241 [patent_app_country] => US [patent_app_date] => 2006-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 83 [patent_no_of_words] => 20638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/636/07636252.pdf [firstpage_image] =>[orig_patent_app_number] => 11483241 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 818353 [patent_doc_number] => 07411826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-12 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/480460 [patent_app_country] => US [patent_app_date] => 2006-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 13047 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/411/07411826.pdf [firstpage_image] =>[orig_patent_app_number] => 11480460 [rel_patent_id] =>[rel_patent_doc_number] =>)