Richard M. Lorence

Array ( [id] => 7619123 [patent_doc_number] => 06944066 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-13 [patent_title] => 'Low voltage data path and current sense amplifier' [patent_app_type] => utility [patent_app_number] => 10/835704 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5316 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/944/06944066.pdf [firstpage_image] =>[orig_patent_app_number] => 10835704 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6924581 [patent_doc_number] => 20050237836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Refresh methods for RAM cells featuring high speed access' [patent_app_type] => utility [patent_app_number] => 10/829207 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3378 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237836.pdf [firstpage_image] =>[orig_patent_app_number] => 10829207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 644085 [patent_doc_number] => 07123505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-17 [patent_title] => 'Method of reading information in a magnetic memory by a reversible resistance change in a magnetic tunnel junction' [patent_app_type] => utility [patent_app_number] => 10/827604 [patent_app_country] => US [patent_app_date] => 2004-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/123/07123505.pdf [firstpage_image] =>[orig_patent_app_number] => 10827604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7368099 [patent_doc_number] => 20040218458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-04 [patent_title] => 'Integrated dynamic memory having a control circuit for controlling a refresh mode for memory cells' [patent_app_type] => new [patent_app_number] => 10/823608 [patent_app_country] => US [patent_app_date] => 2004-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2984 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20040218458.pdf [firstpage_image] =>[orig_patent_app_number] => 10823608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7325242 [patent_doc_number] => 20040252568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Double read stage sense amplifier' [patent_app_type] => new [patent_app_number] => 10/816204 [patent_app_country] => US [patent_app_date] => 2004-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5361 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20040252568.pdf [firstpage_image] =>[orig_patent_app_number] => 10816204 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7325217 [patent_doc_number] => 20040252548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/812403 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 22518 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20040252548.pdf [firstpage_image] =>[orig_patent_app_number] => 10812403 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7411646 [patent_doc_number] => 20040207025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Data processor' [patent_app_type] => new [patent_app_number] => 10/811902 [patent_app_country] => US [patent_app_date] => 2004-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9603 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20040207025.pdf [firstpage_image] =>[orig_patent_app_number] => 10811902 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7189083 [patent_doc_number] => 20050162944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Redundant memory architecture with defragmentation capability' [patent_app_type] => utility [patent_app_number] => 10/810808 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3640 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0162/20050162944.pdf [firstpage_image] =>[orig_patent_app_number] => 10810808 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7451461 [patent_doc_number] => 20040196705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/808402 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 13031 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20040196705.pdf [firstpage_image] =>[orig_patent_app_number] => 10808402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 786457 [patent_doc_number] => 06990013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-24 [patent_title] => 'Magnetic memory, and method for writing the same' [patent_app_type] => utility [patent_app_number] => 10/808404 [patent_app_country] => US [patent_app_date] => 2004-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 6923 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/990/06990013.pdf [firstpage_image] =>[orig_patent_app_number] => 10808404 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7172480 [patent_doc_number] => 20050122799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-09 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT PROVIDED WITH SEMICONDUCTOR MEMORY CIRCUIT HAVING REDUNDANCY FUNCTION AND METHOD FOR TRANSFERRING ADDRESS DATA' [patent_app_type] => utility [patent_app_number] => 10/809308 [patent_app_country] => US [patent_app_date] => 2004-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4619 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20050122799.pdf [firstpage_image] =>[orig_patent_app_number] => 10809308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7146324 [patent_doc_number] => 20040170050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Semiconductor integrated circuit device with improved storage MOSFET arrangement' [patent_app_type] => new [patent_app_number] => 10/796023 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 14048 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20040170050.pdf [firstpage_image] =>[orig_patent_app_number] => 10796023 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7315808 [patent_doc_number] => 20040223363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'High density semiconductor memory cell and memory array using a single transistor and having counter-doped poly and buried diffusion wordline' [patent_app_type] => new [patent_app_number] => 10/798753 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 10004 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20040223363.pdf [firstpage_image] =>[orig_patent_app_number] => 10798753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 678376 [patent_doc_number] => 07088606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Dynamic RAM storage techniques' [patent_app_type] => utility [patent_app_number] => 10/798608 [patent_app_country] => US [patent_app_date] => 2004-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4682 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/088/07088606.pdf [firstpage_image] =>[orig_patent_app_number] => 10798608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 723367 [patent_doc_number] => 07050316 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-23 [patent_title] => 'Differential non-volatile content addressable memory cell and array using phase changing resistor storage elements' [patent_app_type] => utility [patent_app_number] => 10/797207 [patent_app_country] => US [patent_app_date] => 2004-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2404 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/050/07050316.pdf [firstpage_image] =>[orig_patent_app_number] => 10797207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7342469 [patent_doc_number] => 20040246765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same' [patent_app_type] => new [patent_app_number] => 10/793806 [patent_app_country] => US [patent_app_date] => 2004-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17016 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20040246765.pdf [firstpage_image] =>[orig_patent_app_number] => 10793806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6943598 [patent_doc_number] => 20050195647 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-08 [patent_title] => '1R1D MRAM block architecture' [patent_app_type] => utility [patent_app_number] => 10/794302 [patent_app_country] => US [patent_app_date] => 2004-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5917 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20050195647.pdf [firstpage_image] =>[orig_patent_app_number] => 10794302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7141719 [patent_doc_number] => 20050117387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Phase-change memory and method having restore function' [patent_app_type] => utility [patent_app_number] => 10/788407 [patent_app_country] => US [patent_app_date] => 2004-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4468 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20050117387.pdf [firstpage_image] =>[orig_patent_app_number] => 10788407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6995380 [patent_doc_number] => 20050135158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-23 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/788704 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3184 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20050135158.pdf [firstpage_image] =>[orig_patent_app_number] => 10788704 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 997861 [patent_doc_number] => 06914835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Semiconductor memory device, and semiconductor device with the semiconductor memory device and logic circuit device therein' [patent_app_type] => utility [patent_app_number] => 10/786708 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11442 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914835.pdf [firstpage_image] =>[orig_patent_app_number] => 10786708 [rel_patent_id] =>[rel_patent_doc_number] =>)