Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1064784 [patent_doc_number] => 06850437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Nonvolatile semiconductor memory device and method of retrieving faulty in the same' [patent_app_type] => utility [patent_app_number] => 10/781921 [patent_app_country] => US [patent_app_date] => 2004-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4443 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850437.pdf [firstpage_image] =>[orig_patent_app_number] => 10781921 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781921
Nonvolatile semiconductor memory device and method of retrieving faulty in the same Feb 19, 2004 Issued
Array ( [id] => 7457312 [patent_doc_number] => 20040165445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Semiconductor nonvolatile storage device' [patent_app_type] => new [patent_app_number] => 10/781808 [patent_app_country] => US [patent_app_date] => 2004-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 11408 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20040165445.pdf [firstpage_image] =>[orig_patent_app_number] => 10781808 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781808
Semiconductor nonvolatile storage device Feb 19, 2004 Issued
Array ( [id] => 554368 [patent_doc_number] => 07167391 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-23 [patent_title] => 'Multilayer pinned reference layer for a magnetic storage device' [patent_app_type] => utility [patent_app_number] => 10/775807 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5198 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/167/07167391.pdf [firstpage_image] =>[orig_patent_app_number] => 10775807 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775807
Multilayer pinned reference layer for a magnetic storage device Feb 10, 2004 Issued
Array ( [id] => 7421123 [patent_doc_number] => 20040160821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'HYBRID SEMICONDUCTOR - MAGNETIC SPIN BASED MEMORY' [patent_app_type] => new [patent_app_number] => 10/776987 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9948 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160821.pdf [firstpage_image] =>[orig_patent_app_number] => 10776987 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776987
Hybrid semiconductormagnetic spin based memory Feb 9, 2004 Issued
Array ( [id] => 969898 [patent_doc_number] => 06940769 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-06 [patent_title] => 'Method of driving and testing a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/775606 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1629 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/940/06940769.pdf [firstpage_image] =>[orig_patent_app_number] => 10775606 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775606
Method of driving and testing a semiconductor memory device Feb 9, 2004 Issued
Array ( [id] => 7627351 [patent_doc_number] => 06807090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Method of making hybrid semiconductormagnetic spin based memory' [patent_app_type] => B2 [patent_app_number] => 10/776939 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9841 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/807/06807090.pdf [firstpage_image] =>[orig_patent_app_number] => 10776939 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776939
Method of making hybrid semiconductormagnetic spin based memory Feb 9, 2004 Issued
Array ( [id] => 7420996 [patent_doc_number] => 20040160800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Stacked hybrid semiconductor-magnetic spin based memory' [patent_app_type] => new [patent_app_number] => 10/776144 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160800.pdf [firstpage_image] =>[orig_patent_app_number] => 10776144 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776144
Stacked hybrid semiconductor-magnetic spin based memory Feb 9, 2004 Issued
Array ( [id] => 1110845 [patent_doc_number] => 06809959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-26 [patent_title] => 'Hybrid semiconductormagnetic spin based memory with low transmission barrier' [patent_app_type] => B2 [patent_app_number] => 10/776978 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 9843 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/809/06809959.pdf [firstpage_image] =>[orig_patent_app_number] => 10776978 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776978
Hybrid semiconductormagnetic spin based memory with low transmission barrier Feb 9, 2004 Issued
Array ( [id] => 780924 [patent_doc_number] => 06996025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-02-07 [patent_title] => 'Integrated circuit memory devices having zig-zag arrangements of column select IO blocks to increase input/output line routing efficiency' [patent_app_type] => utility [patent_app_number] => 10/774902 [patent_app_country] => US [patent_app_date] => 2004-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/996/06996025.pdf [firstpage_image] =>[orig_patent_app_number] => 10774902 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/774902
Integrated circuit memory devices having zig-zag arrangements of column select IO blocks to increase input/output line routing efficiency Feb 8, 2004 Issued
Array ( [id] => 994845 [patent_doc_number] => 06917553 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/770404 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 14591 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/917/06917553.pdf [firstpage_image] =>[orig_patent_app_number] => 10770404 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/770404
Semiconductor memory device Feb 3, 2004 Issued
Array ( [id] => 997868 [patent_doc_number] => 06914841 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-05 [patent_title] => 'System and method for refreshing a dynamic memory device' [patent_app_type] => utility [patent_app_number] => 10/768202 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5599 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914841.pdf [firstpage_image] =>[orig_patent_app_number] => 10768202 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/768202
System and method for refreshing a dynamic memory device Jan 29, 2004 Issued
Array ( [id] => 684206 [patent_doc_number] => 07082064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Individual I/O modulation in memory devices' [patent_app_type] => utility [patent_app_number] => 10/766004 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3181 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082064.pdf [firstpage_image] =>[orig_patent_app_number] => 10766004 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766004
Individual I/O modulation in memory devices Jan 28, 2004 Issued
Array ( [id] => 7087718 [patent_doc_number] => 20050007830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'System and method for reading a memory cell' [patent_app_type] => utility [patent_app_number] => 10/765483 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10382 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20050007830.pdf [firstpage_image] =>[orig_patent_app_number] => 10765483 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765483
System and method for reading a memory cell Jan 26, 2004 Issued
Array ( [id] => 7225400 [patent_doc_number] => 20040156234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown' [patent_app_type] => new [patent_app_number] => 10/765802 [patent_app_country] => US [patent_app_date] => 2004-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8454 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20040156234.pdf [firstpage_image] =>[orig_patent_app_number] => 10765802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/765802
High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown Jan 25, 2004 Issued
Array ( [id] => 7274296 [patent_doc_number] => 20040233747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'RAM store and control method therefor' [patent_app_type] => new [patent_app_number] => 10/762280 [patent_app_country] => US [patent_app_date] => 2004-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5439 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20040233747.pdf [firstpage_image] =>[orig_patent_app_number] => 10762280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/762280
RAM store and control method therefor Jan 22, 2004 Issued
Array ( [id] => 7611871 [patent_doc_number] => 06903968 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Nonvolatile memory capable of storing multibits binary information and the method of forming the same' [patent_app_type] => utility [patent_app_number] => 10/763773 [patent_app_country] => US [patent_app_date] => 2004-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4335 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903968.pdf [firstpage_image] =>[orig_patent_app_number] => 10763773 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/763773
Nonvolatile memory capable of storing multibits binary information and the method of forming the same Jan 21, 2004 Issued
Array ( [id] => 6903415 [patent_doc_number] => 20050098810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Semiconductor memory devices and methods of fabricating semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/761222 [patent_app_country] => US [patent_app_date] => 2004-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10386 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098810.pdf [firstpage_image] =>[orig_patent_app_number] => 10761222 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/761222
Semiconductor memory devices and methods of fabricating semiconductor memory device Jan 21, 2004 Issued
Array ( [id] => 7338134 [patent_doc_number] => 20040190324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-30 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => new [patent_app_number] => 10/758179 [patent_app_country] => US [patent_app_date] => 2004-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4814 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20040190324.pdf [firstpage_image] =>[orig_patent_app_number] => 10758179 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/758179
Ferroelectric memory device Jan 15, 2004 Issued
Array ( [id] => 1099283 [patent_doc_number] => 06822898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'Multi-value nonvolatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/755350 [patent_app_country] => US [patent_app_date] => 2004-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4937 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822898.pdf [firstpage_image] =>[orig_patent_app_number] => 10755350 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/755350
Multi-value nonvolatile semiconductor memory device Jan 12, 2004 Issued
Array ( [id] => 754313 [patent_doc_number] => 07023740 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-04 [patent_title] => 'Substrate bias for programming non-volatile memory' [patent_app_type] => utility [patent_app_number] => 10/755979 [patent_app_country] => US [patent_app_date] => 2004-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4140 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023740.pdf [firstpage_image] =>[orig_patent_app_number] => 10755979 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/755979
Substrate bias for programming non-volatile memory Jan 11, 2004 Issued
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