Richard M. Lorence

Array ( [id] => 1074595 [patent_doc_number] => 06839263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Memory array with continuous current path through multiple lines' [patent_app_type] => utility [patent_app_number] => 10/358706 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 28 [patent_no_of_words] => 9814 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839263.pdf [firstpage_image] =>[orig_patent_app_number] => 10358706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1216079 [patent_doc_number] => 06711050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/358202 [patent_app_country] => US [patent_app_date] => 2003-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5194 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/711/06711050.pdf [firstpage_image] =>[orig_patent_app_number] => 10358202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1084379 [patent_doc_number] => 06834004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-21 [patent_title] => 'Semiconductor integrated circuit having logic circuit comprising transistors with lower threshold voltage values and improved pattern layout' [patent_app_type] => B2 [patent_app_number] => 10/357752 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 8965 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/834/06834004.pdf [firstpage_image] =>[orig_patent_app_number] => 10357752 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7611887 [patent_doc_number] => 06903952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Content addressable memory cell techniques' [patent_app_type] => utility [patent_app_number] => 10/355467 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1688 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903952.pdf [firstpage_image] =>[orig_patent_app_number] => 10355467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1256037 [patent_doc_number] => 06671198 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/354122 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 9588 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/671/06671198.pdf [firstpage_image] =>[orig_patent_app_number] => 10354122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7263495 [patent_doc_number] => 20040151044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Methods and circuits for balancing bitline precharge' [patent_app_type] => new [patent_app_number] => 10/355802 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4635 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20040151044.pdf [firstpage_image] =>[orig_patent_app_number] => 10355802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7392635 [patent_doc_number] => 20040017718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Non-volatile semiconductor memory device conducting read operation using a reference cell' [patent_app_type] => new [patent_app_number] => 10/351304 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14091 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20040017718.pdf [firstpage_image] =>[orig_patent_app_number] => 10351304 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1163849 [patent_doc_number] => 06765839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Refresh circuit having variable restore time according to operating mode of semiconductor memory device and refresh method of the same' [patent_app_type] => B2 [patent_app_number] => 10/351008 [patent_app_country] => US [patent_app_date] => 2003-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3047 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765839.pdf [firstpage_image] =>[orig_patent_app_number] => 10351008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7320551 [patent_doc_number] => 20040136252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Method and apparatus for enhanced sensing of low voltage memory' [patent_app_type] => new [patent_app_number] => 10/345008 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3010 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20040136252.pdf [firstpage_image] =>[orig_patent_app_number] => 10345008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1019830 [patent_doc_number] => 06891755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Architecture for a flash-EEPROM simultaneously readable in other sectors while erasing and/or programming one or more sectors' [patent_app_type] => utility [patent_app_number] => 10/340207 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3602 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891755.pdf [firstpage_image] =>[orig_patent_app_number] => 10340207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1182049 [patent_doc_number] => 06740927 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-25 [patent_title] => 'Nonvolatile memory capable of storing multibits binary information and the method of forming the same' [patent_app_type] => B1 [patent_app_number] => 10/338108 [patent_app_country] => US [patent_app_date] => 2003-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4294 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/740/06740927.pdf [firstpage_image] =>[orig_patent_app_number] => 10338108 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7374624 [patent_doc_number] => 20040027859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/334004 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4510 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027859.pdf [firstpage_image] =>[orig_patent_app_number] => 10334004 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1208625 [patent_doc_number] => 06717844 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-06 [patent_title] => 'Semiconductor memory device with latch circuit and two magneto-resistance elements' [patent_app_type] => B1 [patent_app_number] => 10/334002 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5283 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/717/06717844.pdf [firstpage_image] =>[orig_patent_app_number] => 10334002 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7611874 [patent_doc_number] => 06903965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Thin film magnetic memory device permitting high precision data read' [patent_app_type] => utility [patent_app_number] => 10/334009 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 10780 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903965.pdf [firstpage_image] =>[orig_patent_app_number] => 10334009 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1164317 [patent_doc_number] => 06762951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => B2 [patent_app_number] => 10/330077 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 13943 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 417 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762951.pdf [firstpage_image] =>[orig_patent_app_number] => 10330077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 980360 [patent_doc_number] => 06930905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Voltage boosting device for a ferroelectric memory device' [patent_app_type] => utility [patent_app_number] => 10/330110 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 5493 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930905.pdf [firstpage_image] =>[orig_patent_app_number] => 10330110 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6682023 [patent_doc_number] => 20030117887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Fast cycle RAM and data readout method therefor' [patent_app_type] => new [patent_app_number] => 10/331119 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8005 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20030117887.pdf [firstpage_image] =>[orig_patent_app_number] => 10331119 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6850345 [patent_doc_number] => 20030142547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Regulation method for the source terminal voltage in a non-volatile memory cell during a program phase and corresponding program circuit' [patent_app_type] => new [patent_app_number] => 10/331106 [patent_app_country] => US [patent_app_date] => 2002-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3804 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142547.pdf [firstpage_image] =>[orig_patent_app_number] => 10331106 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 942208 [patent_doc_number] => 06970375 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-29 [patent_title] => 'Providing a reference voltage to a cross point memory array' [patent_app_type] => utility [patent_app_number] => 10/330170 [patent_app_country] => US [patent_app_date] => 2002-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8187 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970375.pdf [firstpage_image] =>[orig_patent_app_number] => 10330170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6700404 [patent_doc_number] => 20030223284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Semiconductor memory device capable of improving quality of voltage waveform given in a signal interconnection layer' [patent_app_type] => new [patent_app_number] => 10/329293 [patent_app_country] => US [patent_app_date] => 2002-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12652 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20030223284.pdf [firstpage_image] =>[orig_patent_app_number] => 10329293 [rel_patent_id] =>[rel_patent_doc_number] =>)