Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7627362 [patent_doc_number] => 06807079 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Device having a state dependent upon the state of particles dispersed in a carrier' [patent_app_type] => B2 [patent_app_number] => 10/285802 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3730 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/807/06807079.pdf [firstpage_image] =>[orig_patent_app_number] => 10285802 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/285802
Device having a state dependent upon the state of particles dispersed in a carrier Oct 31, 2002 Issued
Array ( [id] => 6868799 [patent_doc_number] => 20030081488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'Method and apparatus for refreshing memory cells' [patent_app_type] => new [patent_app_number] => 10/284806 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20030081488.pdf [firstpage_image] =>[orig_patent_app_number] => 10284806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284806
Method and apparatus for refreshing memory cells Oct 30, 2002 Issued
Array ( [id] => 7162901 [patent_doc_number] => 20040076036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Magnetic memory device' [patent_app_type] => new [patent_app_number] => 10/278008 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12439 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20040076036.pdf [firstpage_image] =>[orig_patent_app_number] => 10278008 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/278008
Magnetic memory device employing giant magnetoresistance effect Oct 21, 2002 Issued
Array ( [id] => 1219948 [patent_doc_number] => 06707714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-16 [patent_title] => 'Read disturb alleviated flash memory' [patent_app_type] => B2 [patent_app_number] => 10/277151 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6623 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/707/06707714.pdf [firstpage_image] =>[orig_patent_app_number] => 10277151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/277151
Read disturb alleviated flash memory Oct 21, 2002 Issued
Array ( [id] => 7624506 [patent_doc_number] => 06724670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Shared redundancy for memory having column addressing' [patent_app_type] => B2 [patent_app_number] => 10/277063 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4831 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724670.pdf [firstpage_image] =>[orig_patent_app_number] => 10277063 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/277063
Shared redundancy for memory having column addressing Oct 20, 2002 Issued
Array ( [id] => 7211150 [patent_doc_number] => 20040071036 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Internal voltage converter scheme for controlling the power-up slope of internal supply voltage' [patent_app_type] => new [patent_app_number] => 10/272404 [patent_app_country] => US [patent_app_date] => 2002-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3542 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20040071036.pdf [firstpage_image] =>[orig_patent_app_number] => 10272404 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/272404
Internal voltage converter scheme for controlling the power-up slope of internal supply voltage Oct 14, 2002 Issued
Array ( [id] => 1216111 [patent_doc_number] => 06711063 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-23 [patent_title] => 'EEPROM memory cell array architecture for substantially eliminating leakage current' [patent_app_type] => B1 [patent_app_number] => 10/264203 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2344 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/711/06711063.pdf [firstpage_image] =>[orig_patent_app_number] => 10264203 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/264203
EEPROM memory cell array architecture for substantially eliminating leakage current Oct 2, 2002 Issued
Array ( [id] => 1127033 [patent_doc_number] => 06795363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-21 [patent_title] => 'Refresh control method of semiconductor memory device and semiconductor memory device comprising the same control method' [patent_app_type] => B2 [patent_app_number] => 10/260302 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10573 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795363.pdf [firstpage_image] =>[orig_patent_app_number] => 10260302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260302
Refresh control method of semiconductor memory device and semiconductor memory device comprising the same control method Sep 30, 2002 Issued
Array ( [id] => 7619101 [patent_doc_number] => 06944088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-13 [patent_title] => 'Apparatus and method for generating memory access signals, and memory accessed using said signals' [patent_app_type] => utility [patent_app_number] => 10/262500 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 4216 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/944/06944088.pdf [firstpage_image] =>[orig_patent_app_number] => 10262500 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262500
Apparatus and method for generating memory access signals, and memory accessed using said signals Sep 29, 2002 Issued
Array ( [id] => 986606 [patent_doc_number] => 06925008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Non-volatile semiconductor memory device with a memory unit including not more than two memory cell transistors' [patent_app_type] => utility [patent_app_number] => 10/256102 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 12829 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925008.pdf [firstpage_image] =>[orig_patent_app_number] => 10256102 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/256102
Non-volatile semiconductor memory device with a memory unit including not more than two memory cell transistors Sep 26, 2002 Issued
Array ( [id] => 7268179 [patent_doc_number] => 20040056697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'DQS postamble noise suppression by forcing a minimum pulse length' [patent_app_type] => new [patent_app_number] => 10/254305 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2149 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0056/20040056697.pdf [firstpage_image] =>[orig_patent_app_number] => 10254305 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/254305
DQS postamble noise suppression by forcing a minimum pulse length Sep 24, 2002 Issued
Array ( [id] => 957005 [patent_doc_number] => 06956759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Ferrodielectric non-volatile semiconductor memory' [patent_app_type] => utility [patent_app_number] => 10/416662 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 67 [patent_no_of_words] => 25252 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956759.pdf [firstpage_image] =>[orig_patent_app_number] => 10416662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/416662
Ferrodielectric non-volatile semiconductor memory Sep 23, 2002 Issued
Array ( [id] => 6705233 [patent_doc_number] => 20030151967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Dram power-source controller' [patent_app_type] => new [patent_app_number] => 10/252102 [patent_app_country] => US [patent_app_date] => 2002-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15779 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20030151967.pdf [firstpage_image] =>[orig_patent_app_number] => 10252102 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/252102
DRAM power-source controller that reduces current consumption during standby Sep 22, 2002 Issued
Array ( [id] => 1288302 [patent_doc_number] => 06643193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-04 [patent_title] => 'Semiconductor device, microcomputer and flash memory' [patent_app_type] => B2 [patent_app_number] => 10/247301 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 42 [patent_no_of_words] => 18762 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643193.pdf [firstpage_image] =>[orig_patent_app_number] => 10247301 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247301
Semiconductor device, microcomputer and flash memory Sep 19, 2002 Issued
Array ( [id] => 1306169 [patent_doc_number] => 06625056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-23 [patent_title] => 'Semiconductor memory device having memory cells requiring no refresh operations' [patent_app_type] => B1 [patent_app_number] => 10/247349 [patent_app_country] => US [patent_app_date] => 2002-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 12631 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625056.pdf [firstpage_image] =>[orig_patent_app_number] => 10247349 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/247349
Semiconductor memory device having memory cells requiring no refresh operations Sep 19, 2002 Issued
Array ( [id] => 6800279 [patent_doc_number] => 20030095443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'System and methods for manufacturing non-volatile semiconductor memory apparatus' [patent_app_type] => new [patent_app_number] => 10/246708 [patent_app_country] => US [patent_app_date] => 2002-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 14889 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20030095443.pdf [firstpage_image] =>[orig_patent_app_number] => 10246708 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/246708
System and methods for manufacturing non-volatile semiconductor memory apparatus Sep 18, 2002 Issued
Array ( [id] => 6782047 [patent_doc_number] => 20030063494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Semiconductor memory which has reduced fluctuation of writing speed' [patent_app_type] => new [patent_app_number] => 10/245302 [patent_app_country] => US [patent_app_date] => 2002-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6438 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20030063494.pdf [firstpage_image] =>[orig_patent_app_number] => 10245302 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245302
Semiconductor memory which has reduced fluctuation of writing speed Sep 17, 2002 Issued
Array ( [id] => 7454662 [patent_doc_number] => 20040052147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Multiport SRAM cell' [patent_app_type] => new [patent_app_number] => 10/242809 [patent_app_country] => US [patent_app_date] => 2002-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7817 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052147.pdf [firstpage_image] =>[orig_patent_app_number] => 10242809 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/242809
SRAM cell with single-ended and differential read/write ports Sep 12, 2002 Issued
Array ( [id] => 6776677 [patent_doc_number] => 20030047757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Semiconductor integrated circuit and memory system' [patent_app_type] => new [patent_app_number] => 10/241908 [patent_app_country] => US [patent_app_date] => 2002-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3343 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20030047757.pdf [firstpage_image] =>[orig_patent_app_number] => 10241908 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/241908
Semiconductor integrated circuit and memory system Sep 11, 2002 Issued
Array ( [id] => 736750 [patent_doc_number] => 07038960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-02 [patent_title] => 'High speed and high precision sensing for digital multilevel non-volatile memory system' [patent_app_type] => utility [patent_app_number] => 10/241442 [patent_app_country] => US [patent_app_date] => 2002-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 11756 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/038/07038960.pdf [firstpage_image] =>[orig_patent_app_number] => 10241442 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/241442
High speed and high precision sensing for digital multilevel non-volatile memory system Sep 9, 2002 Issued
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