Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6303853 [patent_doc_number] => 20020093845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-18 [patent_title] => 'Magnetic semiconductor memory apparatus and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 09/934602 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 6150 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20020093845.pdf [firstpage_image] =>[orig_patent_app_number] => 09934602 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/934602
Magnetic semiconductor memory apparatus and method of manufacturing the same Aug 22, 2001 Issued
Array ( [id] => 6837986 [patent_doc_number] => 20030035326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'KICKB SIGNAL GENERATOR' [patent_app_type] => new [patent_app_number] => 09/932077 [patent_app_country] => US [patent_app_date] => 2001-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2193 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20030035326.pdf [firstpage_image] =>[orig_patent_app_number] => 09932077 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/932077
Kickb signal generator Aug 16, 2001 Issued
Array ( [id] => 1603874 [patent_doc_number] => 06434057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Memory device with a sense amplifier detection circuit to control an output buffer amplifier' [patent_app_type] => B1 [patent_app_number] => 09/682306 [patent_app_country] => US [patent_app_date] => 2001-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3829 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434057.pdf [firstpage_image] =>[orig_patent_app_number] => 09682306 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682306
Memory device with a sense amplifier detection circuit to control an output buffer amplifier Aug 15, 2001 Issued
Array ( [id] => 6837997 [patent_doc_number] => 20030035337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'High density mask ROM having flat-type bank select' [patent_app_type] => new [patent_app_number] => 09/930306 [patent_app_country] => US [patent_app_date] => 2001-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4231 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0035/20030035337.pdf [firstpage_image] =>[orig_patent_app_number] => 09930306 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/930306
High density mask ROM having flat-type bank select Aug 15, 2001 Abandoned
Array ( [id] => 1057965 [patent_doc_number] => 06856566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Timer circuit and semiconductor memory incorporating the timer circuit' [patent_app_type] => utility [patent_app_number] => 10/343806 [patent_app_country] => US [patent_app_date] => 2001-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 27513 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856566.pdf [firstpage_image] =>[orig_patent_app_number] => 10343806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/343806
Timer circuit and semiconductor memory incorporating the timer circuit Aug 2, 2001 Issued
Array ( [id] => 6714783 [patent_doc_number] => 20030026131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Redundancy circuit and method for replacing defective memory cells in a flash memory device' [patent_app_type] => new [patent_app_number] => 09/922176 [patent_app_country] => US [patent_app_date] => 2001-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6765 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20030026131.pdf [firstpage_image] =>[orig_patent_app_number] => 09922176 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/922176
Redundancy circuit and method for replacing defective memory cells in a flash memory device Aug 1, 2001 Issued
Array ( [id] => 1425654 [patent_doc_number] => 06525959 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'NOR array with buried trench source line' [patent_app_type] => B1 [patent_app_number] => 09/917178 [patent_app_country] => US [patent_app_date] => 2001-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 3469 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525959.pdf [firstpage_image] =>[orig_patent_app_number] => 09917178 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/917178
NOR array with buried trench source line Jul 29, 2001 Issued
Array ( [id] => 6489423 [patent_doc_number] => 20020024878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-28 [patent_title] => 'Circuit for generating address of semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/906108 [patent_app_country] => US [patent_app_date] => 2001-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3339 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20020024878.pdf [firstpage_image] =>[orig_patent_app_number] => 09906108 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/906108
Circuit for generating address of semiconductor memory device Jul 16, 2001 Issued
Array ( [id] => 1564268 [patent_doc_number] => 06438046 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'System and method for providing row redundancy with no timing penalty for built-in-self-repair (BISR) in high density memories' [patent_app_type] => B1 [patent_app_number] => 09/907202 [patent_app_country] => US [patent_app_date] => 2001-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2608 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/438/06438046.pdf [firstpage_image] =>[orig_patent_app_number] => 09907202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/907202
System and method for providing row redundancy with no timing penalty for built-in-self-repair (BISR) in high density memories Jul 16, 2001 Issued
Array ( [id] => 1427686 [patent_doc_number] => 06519171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-11 [patent_title] => 'Semiconductor device and multichip module' [patent_app_type] => B2 [patent_app_number] => 09/904478 [patent_app_country] => US [patent_app_date] => 2001-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5696 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519171.pdf [firstpage_image] =>[orig_patent_app_number] => 09904478 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/904478
Semiconductor device and multichip module Jul 15, 2001 Issued
Array ( [id] => 5950054 [patent_doc_number] => 20020006062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-17 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/903509 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9150 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20020006062.pdf [firstpage_image] =>[orig_patent_app_number] => 09903509 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/903509
Semiconductor device Jul 12, 2001 Issued
Array ( [id] => 6884394 [patent_doc_number] => 20010038553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Mixed mode multi-level memory' [patent_app_type] => new [patent_app_number] => 09/905421 [patent_app_country] => US [patent_app_date] => 2001-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038553.pdf [firstpage_image] =>[orig_patent_app_number] => 09905421 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/905421
Mixed mode multi-level indicator Jul 12, 2001 Issued
Array ( [id] => 1555116 [patent_doc_number] => 06400614 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Transmission device and integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/903004 [patent_app_country] => US [patent_app_date] => 2001-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6828 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/400/06400614.pdf [firstpage_image] =>[orig_patent_app_number] => 09903004 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/903004
Transmission device and integrated circuit Jul 10, 2001 Issued
Array ( [id] => 1427352 [patent_doc_number] => 06522594 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Memory array incorporating noise detection line' [patent_app_type] => B1 [patent_app_number] => 09/897704 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8877 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522594.pdf [firstpage_image] =>[orig_patent_app_number] => 09897704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/897704
Memory array incorporating noise detection line Jun 28, 2001 Issued
Array ( [id] => 1431670 [patent_doc_number] => 06504753 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Method and apparatus for discharging memory array lines' [patent_app_type] => B1 [patent_app_number] => 09/897784 [patent_app_country] => US [patent_app_date] => 2001-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 15819 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504753.pdf [firstpage_image] =>[orig_patent_app_number] => 09897784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/897784
Method and apparatus for discharging memory array lines Jun 28, 2001 Issued
Array ( [id] => 1359200 [patent_doc_number] => 06584026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-24 [patent_title] => 'Semiconductor integrated circuit capable of adjusting input offset voltage' [patent_app_type] => B2 [patent_app_number] => 09/892902 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7882 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584026.pdf [firstpage_image] =>[orig_patent_app_number] => 09892902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892902
Semiconductor integrated circuit capable of adjusting input offset voltage Jun 27, 2001 Issued
Array ( [id] => 1572694 [patent_doc_number] => 06498756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-24 [patent_title] => 'Semiconductor memory device having row repair circuitry' [patent_app_type] => B2 [patent_app_number] => 09/891508 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6809 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/498/06498756.pdf [firstpage_image] =>[orig_patent_app_number] => 09891508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/891508
Semiconductor memory device having row repair circuitry Jun 26, 2001 Issued
Array ( [id] => 1507418 [patent_doc_number] => 06466501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-15 [patent_title] => 'Semiconductor memory device having sense amplifier and method for driving sense amplifier' [patent_app_type] => B2 [patent_app_number] => 09/891507 [patent_app_country] => US [patent_app_date] => 2001-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5603 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466501.pdf [firstpage_image] =>[orig_patent_app_number] => 09891507 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/891507
Semiconductor memory device having sense amplifier and method for driving sense amplifier Jun 26, 2001 Issued
Array ( [id] => 6139680 [patent_doc_number] => 20020001227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-03 [patent_title] => 'Multi-state non-volatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/887904 [patent_app_country] => US [patent_app_date] => 2001-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2731 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20020001227.pdf [firstpage_image] =>[orig_patent_app_number] => 09887904 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/887904
Multi-state non-volatile semiconductor memory device Jun 20, 2001 Issued
Array ( [id] => 6239878 [patent_doc_number] => 20020044488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'Dynamic random access memory (DRAM) having a structure for emplying a word line low voltage' [patent_app_type] => new [patent_app_number] => 09/886202 [patent_app_country] => US [patent_app_date] => 2001-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1659 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20020044488.pdf [firstpage_image] =>[orig_patent_app_number] => 09886202 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/886202
Dynamic random access memory (DRAM) having a structure for emplying a word line low voltage Jun 19, 2001 Issued
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