Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4327469 [patent_doc_number] => 06243302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Apparatus for outputting data using common pull-up/pull-down lines with reduced load' [patent_app_type] => 1 [patent_app_number] => 9/605306 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2296 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243302.pdf [firstpage_image] =>[orig_patent_app_number] => 605306 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/605306
Apparatus for outputting data using common pull-up/pull-down lines with reduced load Jun 27, 2000 Issued
Array ( [id] => 4418688 [patent_doc_number] => 06310823 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Circuit for generating internal column strobe signal in synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/607204 [patent_app_country] => US [patent_app_date] => 2000-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5222 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310823.pdf [firstpage_image] =>[orig_patent_app_number] => 607204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/607204
Circuit for generating internal column strobe signal in synchronous semiconductor memory device Jun 27, 2000 Issued
Array ( [id] => 4419060 [patent_doc_number] => 06240048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Synchronous type semiconductor memory system with less power consumption' [patent_app_type] => 1 [patent_app_number] => 9/603508 [patent_app_country] => US [patent_app_date] => 2000-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 24 [patent_no_of_words] => 7187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240048.pdf [firstpage_image] =>[orig_patent_app_number] => 603508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/603508
Synchronous type semiconductor memory system with less power consumption Jun 25, 2000 Issued
Array ( [id] => 4418462 [patent_doc_number] => 06310800 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Non-volatile semiconductor memory device and method for driving the same' [patent_app_type] => 1 [patent_app_number] => 9/603888 [patent_app_country] => US [patent_app_date] => 2000-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8726 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310800.pdf [firstpage_image] =>[orig_patent_app_number] => 603888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/603888
Non-volatile semiconductor memory device and method for driving the same Jun 25, 2000 Issued
Array ( [id] => 1536876 [patent_doc_number] => 06411549 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Reference cell for high speed sensing in non-volatile memories' [patent_app_type] => B1 [patent_app_number] => 09/602108 [patent_app_country] => US [patent_app_date] => 2000-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8837 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/411/06411549.pdf [firstpage_image] =>[orig_patent_app_number] => 09602108 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/602108
Reference cell for high speed sensing in non-volatile memories Jun 20, 2000 Issued
Array ( [id] => 1465209 [patent_doc_number] => 06351420 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-26 [patent_title] => 'Voltage boost level clamping circuit for a flash memory' [patent_app_type] => B1 [patent_app_number] => 09/595519 [patent_app_country] => US [patent_app_date] => 2000-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8045 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/351/06351420.pdf [firstpage_image] =>[orig_patent_app_number] => 09595519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/595519
Voltage boost level clamping circuit for a flash memory Jun 15, 2000 Issued
Array ( [id] => 4344694 [patent_doc_number] => 06314023 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Non-volatile programming elements for redundancy and identification in an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/594504 [patent_app_country] => US [patent_app_date] => 2000-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3393 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314023.pdf [firstpage_image] =>[orig_patent_app_number] => 594504 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/594504
Non-volatile programming elements for redundancy and identification in an integrated circuit Jun 14, 2000 Issued
Array ( [id] => 4384571 [patent_doc_number] => 06288963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/593013 [patent_app_country] => US [patent_app_date] => 2000-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 44 [patent_no_of_words] => 19059 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288963.pdf [firstpage_image] =>[orig_patent_app_number] => 593013 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/593013
Semiconductor memory device Jun 12, 2000 Issued
Array ( [id] => 4381019 [patent_doc_number] => 06275429 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Memory device and equalizing circuit for memory device' [patent_app_type] => 1 [patent_app_number] => 9/592006 [patent_app_country] => US [patent_app_date] => 2000-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3825 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275429.pdf [firstpage_image] =>[orig_patent_app_number] => 592006 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/592006
Memory device and equalizing circuit for memory device Jun 11, 2000 Issued
Array ( [id] => 1565198 [patent_doc_number] => 06363015 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method' [patent_app_type] => B1 [patent_app_number] => 09/589723 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3829 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/363/06363015.pdf [firstpage_image] =>[orig_patent_app_number] => 09589723 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/589723
Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method Jun 7, 2000 Issued
Array ( [id] => 4393355 [patent_doc_number] => 06304498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Semiconductor memory device capable of suppressing degradation in operation speed after replacement with redundant memory cell' [patent_app_type] => 1 [patent_app_number] => 9/589106 [patent_app_country] => US [patent_app_date] => 2000-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8183 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304498.pdf [firstpage_image] =>[orig_patent_app_number] => 589106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/589106
Semiconductor memory device capable of suppressing degradation in operation speed after replacement with redundant memory cell Jun 7, 2000 Issued
Array ( [id] => 4273203 [patent_doc_number] => 06259625 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Method and apparatus for reducing high current chip erase in flash memories' [patent_app_type] => 1 [patent_app_number] => 9/589644 [patent_app_country] => US [patent_app_date] => 2000-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4919 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259625.pdf [firstpage_image] =>[orig_patent_app_number] => 589644 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/589644
Method and apparatus for reducing high current chip erase in flash memories Jun 6, 2000 Issued
Array ( [id] => 4369274 [patent_doc_number] => 06219272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Semiconductor random access memory' [patent_app_type] => 1 [patent_app_number] => 9/580208 [patent_app_country] => US [patent_app_date] => 2000-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/219/06219272.pdf [firstpage_image] =>[orig_patent_app_number] => 580208 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/580208
Semiconductor random access memory May 25, 2000 Issued
Array ( [id] => 1552290 [patent_doc_number] => 06347058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-12 [patent_title] => 'Sense amplifier with overdrive and regulated bitline voltage' [patent_app_type] => B1 [patent_app_number] => 09/574806 [patent_app_country] => US [patent_app_date] => 2000-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5117 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/347/06347058.pdf [firstpage_image] =>[orig_patent_app_number] => 09574806 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/574806
Sense amplifier with overdrive and regulated bitline voltage May 18, 2000 Issued
Array ( [id] => 4273487 [patent_doc_number] => 06259644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Equipotential sense methods for resistive cross point memory cell arrays' [patent_app_type] => 1 [patent_app_number] => 9/564308 [patent_app_country] => US [patent_app_date] => 2000-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 4909 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259644.pdf [firstpage_image] =>[orig_patent_app_number] => 564308 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/564308
Equipotential sense methods for resistive cross point memory cell arrays May 2, 2000 Issued
Array ( [id] => 4286920 [patent_doc_number] => 06324111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/561217 [patent_app_country] => US [patent_app_date] => 2000-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4223 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324111.pdf [firstpage_image] =>[orig_patent_app_number] => 561217 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/561217
Semiconductor memory Apr 27, 2000 Issued
Array ( [id] => 6223015 [patent_doc_number] => 20020003721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-10 [patent_title] => 'Solid-state memory with magnetic storage cells' [patent_app_type] => new [patent_app_number] => 09/561317 [patent_app_country] => US [patent_app_date] => 2000-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3618 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20020003721.pdf [firstpage_image] =>[orig_patent_app_number] => 09561317 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/561317
Solid-state memory with magnetic storage cells Apr 27, 2000 Issued
Array ( [id] => 1413866 [patent_doc_number] => 06542425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Refresh control circuit for controlling refresh cycles according to values stored in a register and related refreshing method' [patent_app_type] => B2 [patent_app_number] => 09/558321 [patent_app_country] => US [patent_app_date] => 2000-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5171 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/542/06542425.pdf [firstpage_image] =>[orig_patent_app_number] => 09558321 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/558321
Refresh control circuit for controlling refresh cycles according to values stored in a register and related refreshing method Apr 25, 2000 Issued
Array ( [id] => 4327566 [patent_doc_number] => 06243309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Semiconductor memory device having parallel test mode for simultaneously testing multiple memory cells' [patent_app_type] => 1 [patent_app_number] => 9/552702 [patent_app_country] => US [patent_app_date] => 2000-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4057 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243309.pdf [firstpage_image] =>[orig_patent_app_number] => 552702 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/552702
Semiconductor memory device having parallel test mode for simultaneously testing multiple memory cells Apr 18, 2000 Issued
Array ( [id] => 4420220 [patent_doc_number] => 06229759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Semiconductor memory burst length count determination method' [patent_app_type] => 1 [patent_app_number] => 9/551888 [patent_app_country] => US [patent_app_date] => 2000-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6123 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229759.pdf [firstpage_image] =>[orig_patent_app_number] => 551888 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/551888
Semiconductor memory burst length count determination method Apr 17, 2000 Issued
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