Search

Richard M. Lorence

Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3617, 3622, 0, 3655, 3656, 3681
Total Applications
3174
Issued Applications
2769
Pending Applications
79
Abandoned Applications
335

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3950431 [patent_doc_number] => 05930168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Flash memory with adjustable write operation timing' [patent_app_type] => 1 [patent_app_number] => 9/045605 [patent_app_country] => US [patent_app_date] => 1998-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3214 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930168.pdf [firstpage_image] =>[orig_patent_app_number] => 045605 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/045605
Flash memory with adjustable write operation timing Mar 19, 1998 Issued
Array ( [id] => 4077989 [patent_doc_number] => 06009017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Floating gate memory with substrate band-to-band tunneling induced hot electron injection' [patent_app_type] => 1 [patent_app_number] => 9/041807 [patent_app_country] => US [patent_app_date] => 1998-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6756 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009017.pdf [firstpage_image] =>[orig_patent_app_number] => 041807 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/041807
Floating gate memory with substrate band-to-band tunneling induced hot electron injection Mar 12, 1998 Issued
Array ( [id] => 3960571 [patent_doc_number] => 05991220 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Software programmable write-once fuse memory' [patent_app_type] => 1 [patent_app_number] => 9/037099 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4628 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991220.pdf [firstpage_image] =>[orig_patent_app_number] => 037099 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/037099
Software programmable write-once fuse memory Mar 8, 1998 Issued
Array ( [id] => 4065423 [patent_doc_number] => 05970019 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor memory device with row access in selected column block' [patent_app_type] => 1 [patent_app_number] => 9/035101 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6256 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970019.pdf [firstpage_image] =>[orig_patent_app_number] => 035101 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035101
Semiconductor memory device with row access in selected column block Mar 4, 1998 Issued
Array ( [id] => 3962528 [patent_doc_number] => 05999475 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Internal potential generation circuit that can output a plurality of potentials, suppressing increase in circuit area' [patent_app_type] => 1 [patent_app_number] => 9/034996 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 25 [patent_no_of_words] => 11747 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999475.pdf [firstpage_image] =>[orig_patent_app_number] => 034996 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034996
Internal potential generation circuit that can output a plurality of potentials, suppressing increase in circuit area Mar 4, 1998 Issued
Array ( [id] => 3964507 [patent_doc_number] => 05978311 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Memory with combined synchronous burst and bus efficient functionality' [patent_app_type] => 1 [patent_app_number] => 9/034203 [patent_app_country] => US [patent_app_date] => 1998-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5151 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978311.pdf [firstpage_image] =>[orig_patent_app_number] => 034203 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034203
Memory with combined synchronous burst and bus efficient functionality Mar 2, 1998 Issued
Array ( [id] => 3953693 [patent_doc_number] => 05973993 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Semiconductor memory burst length count determination detector' [patent_app_type] => 1 [patent_app_number] => 9/032122 [patent_app_country] => US [patent_app_date] => 1998-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6191 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973993.pdf [firstpage_image] =>[orig_patent_app_number] => 032122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/032122
Semiconductor memory burst length count determination detector Feb 26, 1998 Issued
09/024720 SUPERVISORY INTEGRATED CIRCUIT WITH DATA STORAGE AND RETRIEVAL OF SYSTEM PARAMETERS Feb 16, 1998 Abandoned
Array ( [id] => 3998624 [patent_doc_number] => 05959924 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Method and circuit for controlling an isolation gate in a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/019520 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5580 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959924.pdf [firstpage_image] =>[orig_patent_app_number] => 019520 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019520
Method and circuit for controlling an isolation gate in a semiconductor memory device Feb 4, 1998 Issued
Array ( [id] => 3962299 [patent_doc_number] => 05956279 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Static random access memory device with burn-in test circuit' [patent_app_type] => 1 [patent_app_number] => 9/019519 [patent_app_country] => US [patent_app_date] => 1998-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3111 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956279.pdf [firstpage_image] =>[orig_patent_app_number] => 019519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/019519
Static random access memory device with burn-in test circuit Feb 4, 1998 Issued
Array ( [id] => 3962474 [patent_doc_number] => 05999471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Semiconductor memory device having a refresh function and a method for refreshing the same' [patent_app_type] => 1 [patent_app_number] => 9/016831 [patent_app_country] => US [patent_app_date] => 1998-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 45 [patent_no_of_words] => 10247 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999471.pdf [firstpage_image] =>[orig_patent_app_number] => 016831 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/016831
Semiconductor memory device having a refresh function and a method for refreshing the same Jan 29, 1998 Issued
Array ( [id] => 4045755 [patent_doc_number] => 05943266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Semiconductor integrated circuit device employing a programming circuit having increased immunity to gate disturbance and method of programming therefor' [patent_app_type] => 1 [patent_app_number] => 9/015626 [patent_app_country] => US [patent_app_date] => 1998-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 6907 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/943/05943266.pdf [firstpage_image] =>[orig_patent_app_number] => 015626 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/015626
Semiconductor integrated circuit device employing a programming circuit having increased immunity to gate disturbance and method of programming therefor Jan 28, 1998 Issued
Array ( [id] => 4012414 [patent_doc_number] => 05986957 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Semiconductor device and applied system device thereof' [patent_app_type] => 1 [patent_app_number] => 9/014630 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4756 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986957.pdf [firstpage_image] =>[orig_patent_app_number] => 014630 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014630
Semiconductor device and applied system device thereof Jan 27, 1998 Issued
Array ( [id] => 7614429 [patent_doc_number] => 06898101 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Microcontroller with programmable logic on a single chip' [patent_app_type] => utility [patent_app_number] => 08/991232 [patent_app_country] => US [patent_app_date] => 1997-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2110 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/898/06898101.pdf [firstpage_image] =>[orig_patent_app_number] => 08991232 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991232
Microcontroller with programmable logic on a single chip Dec 15, 1997 Issued
Array ( [id] => 4108928 [patent_doc_number] => 06049493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-11 [patent_title] => 'Semiconductor memory device having a precharge device' [patent_app_type] => 1 [patent_app_number] => 8/987618 [patent_app_country] => US [patent_app_date] => 1997-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 5591 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/049/06049493.pdf [firstpage_image] =>[orig_patent_app_number] => 987618 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/987618
Semiconductor memory device having a precharge device Dec 8, 1997 Issued
Array ( [id] => 4096819 [patent_doc_number] => 06026026 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Self-convergence of post-erase threshold voltages in a flash memory cell using transient response' [patent_app_type] => 1 [patent_app_number] => 8/985833 [patent_app_country] => US [patent_app_date] => 1997-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4043 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026026.pdf [firstpage_image] =>[orig_patent_app_number] => 985833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/985833
Self-convergence of post-erase threshold voltages in a flash memory cell using transient response Dec 4, 1997 Issued
Array ( [id] => 4047992 [patent_doc_number] => 05995427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Semiconductor memory device having test mode' [patent_app_type] => 1 [patent_app_number] => 8/985219 [patent_app_country] => US [patent_app_date] => 1997-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 6927 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995427.pdf [firstpage_image] =>[orig_patent_app_number] => 985219 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/985219
Semiconductor memory device having test mode Dec 3, 1997 Issued
Array ( [id] => 4230650 [patent_doc_number] => 06041004 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Semiconductor device with high speed write capabilities' [patent_app_type] => 1 [patent_app_number] => 8/982533 [patent_app_country] => US [patent_app_date] => 1997-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8465 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041004.pdf [firstpage_image] =>[orig_patent_app_number] => 982533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/982533
Semiconductor device with high speed write capabilities Dec 1, 1997 Issued
Array ( [id] => 3962200 [patent_doc_number] => 05956272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Programming pulse with varying amplitude' [patent_app_type] => 1 [patent_app_number] => 8/980529 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2531 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956272.pdf [firstpage_image] =>[orig_patent_app_number] => 980529 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/980529
Programming pulse with varying amplitude Nov 30, 1997 Issued
Array ( [id] => 4144281 [patent_doc_number] => 06034891 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Multi-state flash memory defect management' [patent_app_type] => 1 [patent_app_number] => 8/980528 [patent_app_country] => US [patent_app_date] => 1997-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7931 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034891.pdf [firstpage_image] =>[orig_patent_app_number] => 980528 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/980528
Multi-state flash memory defect management Nov 30, 1997 Issued
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