
Richard M. Lorence
Examiner (ID: 3825, Phone: (571)272-7094 , Office: P/3655 )
| Most Active Art Unit | 3502 |
| Art Unit(s) | 3502, 3617, 3622, 0, 3655, 3656, 3681 |
| Total Applications | 3174 |
| Issued Applications | 2769 |
| Pending Applications | 79 |
| Abandoned Applications | 335 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3950431
[patent_doc_number] => 05930168
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[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Flash memory with adjustable write operation timing'
[patent_app_type] => 1
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[pdf_file] => patents/05/930/05930168.pdf
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Array
(
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[patent_issue_date] => 1999-12-28
[patent_title] => 'Floating gate memory with substrate band-to-band tunneling induced hot electron injection'
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Array
(
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[patent_issue_date] => 1999-11-23
[patent_title] => 'Software programmable write-once fuse memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/037099 | Software programmable write-once fuse memory | Mar 8, 1998 | Issued |
Array
(
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[patent_issue_date] => 1999-10-19
[patent_title] => 'Semiconductor memory device with row access in selected column block'
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[patent_app_date] => 1998-03-05
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[firstpage_image] =>[orig_patent_app_number] => 035101
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/035101 | Semiconductor memory device with row access in selected column block | Mar 4, 1998 | Issued |
Array
(
[id] => 3962528
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[patent_issue_date] => 1999-12-07
[patent_title] => 'Internal potential generation circuit that can output a plurality of potentials, suppressing increase in circuit area'
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Array
(
[id] => 3964507
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[patent_issue_date] => 1999-11-02
[patent_title] => 'Memory with combined synchronous burst and bus efficient functionality'
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Array
(
[id] => 3953693
[patent_doc_number] => 05973993
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[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Semiconductor memory burst length count determination detector'
[patent_app_type] => 1
[patent_app_number] => 9/032122
[patent_app_country] => US
[patent_app_date] => 1998-02-27
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[pdf_file] => patents/05/973/05973993.pdf
[firstpage_image] =>[orig_patent_app_number] => 032122
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/032122 | Semiconductor memory burst length count determination detector | Feb 26, 1998 | Issued |
| 09/024720 | SUPERVISORY INTEGRATED CIRCUIT WITH DATA STORAGE AND RETRIEVAL OF SYSTEM PARAMETERS | Feb 16, 1998 | Abandoned |
Array
(
[id] => 3998624
[patent_doc_number] => 05959924
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[patent_title] => 'Method and circuit for controlling an isolation gate in a semiconductor memory device'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/019520 | Method and circuit for controlling an isolation gate in a semiconductor memory device | Feb 4, 1998 | Issued |
Array
(
[id] => 3962299
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[patent_issue_date] => 1999-09-21
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Array
(
[id] => 3962474
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[patent_title] => 'Semiconductor memory device having a refresh function and a method for refreshing the same'
[patent_app_type] => 1
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Array
(
[id] => 4045755
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[patent_title] => 'Semiconductor integrated circuit device employing a programming circuit having increased immunity to gate disturbance and method of programming therefor'
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Array
(
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Array
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[id] => 7614429
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[patent_title] => 'Microcontroller with programmable logic on a single chip'
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Array
(
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Array
(
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Array
(
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Array
(
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Array
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Array
(
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