
Richard Sukyoon Woo
Examiner (ID: 19431)
| Most Active Art Unit | 3745 |
| Art Unit(s) | 3745, 3629, 3639 |
| Total Applications | 372 |
| Issued Applications | 301 |
| Pending Applications | 50 |
| Abandoned Applications | 21 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
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[patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS WITH STRESSED SEMICONDUCTOR MATERIAL'
[patent_app_type] => utility
[patent_app_number] => 13/545646
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[patent_issue_date] => 2013-01-24
[patent_title] => 'SINGLE CRYSTAL U-MOS GATES USING MICROWAVE CRYSTAL REGROWTH'
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Array
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[patent_title] => 'SEMICONDUCTOR PACKAGES'
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Array
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[patent_title] => 'Magnet assisted alignment method for wafer bonding and wafer level chip scale packaging'
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Array
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[patent_title] => 'INTEGRATED CIRCUIT AND A METHOD USING INTEGRATED PROCESS STEPS TO FORM DEEP TRENCH ISOLATION STRUCTURES AND DEEP TRENCH CAPACITOR STRUCTURES FOR THE INTEGRATED CIRCUIT'
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[patent_title] => 'Method of manufacturing card'
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Array
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[patent_title] => 'Nitride semiconductor light emitting device and fabrication method thereof'
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Array
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Array
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