
Richard Sukyoon Woo
Examiner (ID: 19431)
| Most Active Art Unit | 3745 |
| Art Unit(s) | 3745, 3629, 3639 |
| Total Applications | 372 |
| Issued Applications | 301 |
| Pending Applications | 50 |
| Abandoned Applications | 21 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 349136
[patent_doc_number] => 07495254
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-24
[patent_title] => 'Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices'
[patent_app_type] => utility
[patent_app_number] => 11/162128
[patent_app_country] => US
[patent_app_date] => 2005-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3984
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/495/07495254.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162128
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162128 | Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices | Aug 29, 2005 | Issued |
Array
(
[id] => 5180711
[patent_doc_number] => 20070052053
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-08
[patent_title] => 'COMPLEMENTARY METAL OXIDE SEMICONDUCTOR IMAGE SENSOR AND FABRICATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 11/162118
[patent_app_country] => US
[patent_app_date] => 2005-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_claims] => 32
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[pdf_file] => publications/A1/0052/20070052053.pdf
[firstpage_image] =>[orig_patent_app_number] => 11162118
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/162118 | Complementary metal oxide semiconductor image sensor | Aug 28, 2005 | Issued |
Array
(
[id] => 5152018
[patent_doc_number] => 20070034900
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-15
[patent_title] => 'BIPOLAR JUNCTION TRANSISTOR AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/161619
[patent_app_country] => US
[patent_app_date] => 2005-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 3685
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[pdf_file] => publications/A1/0034/20070034900.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161619
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161619 | Bipolar junction transistor | Aug 9, 2005 | Issued |
Array
(
[id] => 5202360
[patent_doc_number] => 20070023839
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'FINFET GATE FORMED OF CARBON NANOTUBES'
[patent_app_type] => utility
[patent_app_number] => 11/161219
[patent_app_country] => US
[patent_app_date] => 2005-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 4089
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
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[pdf_file] => publications/A1/0023/20070023839.pdf
[firstpage_image] =>[orig_patent_app_number] => 11161219
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/161219 | FINFET GATE FORMED OF CARBON NANOTUBES | Jul 26, 2005 | Abandoned |
Array
(
[id] => 820899
[patent_doc_number] => 07408233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-05
[patent_title] => 'Semiconductor device having N-channel thin film transistor with LDD regions and P-channel thin film transistor with LDD region'
[patent_app_type] => utility
[patent_app_number] => 11/178308
[patent_app_country] => US
[patent_app_date] => 2005-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/408/07408233.pdf
[firstpage_image] =>[orig_patent_app_number] => 11178308
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/178308 | Semiconductor device having N-channel thin film transistor with LDD regions and P-channel thin film transistor with LDD region | Jul 11, 2005 | Issued |
Array
(
[id] => 6963824
[patent_doc_number] => 20050230721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'CMOS imager with enhanced transfer of charge and low voltage operation and method of formation'
[patent_app_type] => utility
[patent_app_number] => 11/158045
[patent_app_country] => US
[patent_app_date] => 2005-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0230/20050230721.pdf
[firstpage_image] =>[orig_patent_app_number] => 11158045
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/158045 | CMOS imager with enhanced transfer of charge and low voltage operation and method of formation | Jun 21, 2005 | Issued |
Array
(
[id] => 292678
[patent_doc_number] => 07544972
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Organic electroluminescent display device and method of preparing the same'
[patent_app_type] => utility
[patent_app_number] => 11/149237
[patent_app_country] => US
[patent_app_date] => 2005-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 5016
[patent_no_of_claims] => 9
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/544/07544972.pdf
[firstpage_image] =>[orig_patent_app_number] => 11149237
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/149237 | Organic electroluminescent display device and method of preparing the same | Jun 9, 2005 | Issued |
Array
(
[id] => 6949746
[patent_doc_number] => 20050224840
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-13
[patent_title] => 'Dual-oxide transistors for the improvement of reliability and off-state leakage'
[patent_app_type] => utility
[patent_app_number] => 11/149049
[patent_app_country] => US
[patent_app_date] => 2005-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3833
[patent_no_of_claims] => 20
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[pdf_file] => publications/A1/0224/20050224840.pdf
[firstpage_image] =>[orig_patent_app_number] => 11149049
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/149049 | Dual-oxide transistors for the improvement of reliability and off-state leakage | Jun 7, 2005 | Issued |
Array
(
[id] => 5771126
[patent_doc_number] => 20050266668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-01
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/137537
[patent_app_country] => US
[patent_app_date] => 2005-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => publications/A1/0266/20050266668.pdf
[firstpage_image] =>[orig_patent_app_number] => 11137537
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/137537 | Semiconductor device and method of manufacturing the same | May 25, 2005 | Abandoned |
Array
(
[id] => 568404
[patent_doc_number] => 07462553
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-09
[patent_title] => 'Ultra thin back-illuminated photodiode array fabrication methods'
[patent_app_type] => utility
[patent_app_number] => 11/136281
[patent_app_country] => US
[patent_app_date] => 2005-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 2356
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[pdf_file] => patents/07/462/07462553.pdf
[firstpage_image] =>[orig_patent_app_number] => 11136281
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/136281 | Ultra thin back-illuminated photodiode array fabrication methods | May 23, 2005 | Issued |
Array
(
[id] => 7016459
[patent_doc_number] => 20050218476
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-06
[patent_title] => 'Integrated process for fuse opening and passivation process for Cu/Low-K IMD'
[patent_app_type] => utility
[patent_app_number] => 11/132086
[patent_app_country] => US
[patent_app_date] => 2005-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0218/20050218476.pdf
[firstpage_image] =>[orig_patent_app_number] => 11132086
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/132086 | Integrated process for fuse opening and passivation process for Cu/Low-K IMD | May 17, 2005 | Abandoned |
Array
(
[id] => 7111297
[patent_doc_number] => 20050208753
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[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Dual-damascene interconnects without an etch stop layer by alternating ILDs'
[patent_app_type] => utility
[patent_app_number] => 11/131740
[patent_app_country] => US
[patent_app_date] => 2005-05-17
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[firstpage_image] =>[orig_patent_app_number] => 11131740
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/131740 | Dual-damascene interconnects without an etch stop layer by alternating ILDs | May 16, 2005 | Abandoned |
Array
(
[id] => 7111302
[patent_doc_number] => 20050208758
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Dielectric barrier films for use as copper barrier layers in semiconductor trench and via structures'
[patent_app_type] => utility
[patent_app_number] => 11/131003
[patent_app_country] => US
[patent_app_date] => 2005-05-16
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11131003
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/131003 | Dielectric barrier films for use as copper barrier layers in semiconductor trench and via structures | May 15, 2005 | Issued |
Array
(
[id] => 5659209
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[patent_kind] => A1
[patent_issue_date] => 2006-11-09
[patent_title] => 'Shielding Layer outside the Pixel Regions of Optical Device and Method for Making the Same'
[patent_app_type] => utility
[patent_app_number] => 10/908219
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/908219 | Shielding Layer outside the Pixel Regions of Optical Device and Method for Making the Same | May 2, 2005 | Abandoned |
Array
(
[id] => 6943530
[patent_doc_number] => 20050195579
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[patent_kind] => A1
[patent_issue_date] => 2005-09-08
[patent_title] => 'Apparatus and method for improving AC coupling on circuit boards'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/120393 | Apparatus and method for improving AC coupling on circuit boards | May 1, 2005 | Issued |
Array
(
[id] => 7213791
[patent_doc_number] => 20050253155
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[patent_kind] => A1
[patent_issue_date] => 2005-11-17
[patent_title] => 'Optoelectronic semiconductor chip and method for forming a contact structure for making electrical contact with an optoelectronic semiconductor chip'
[patent_app_type] => utility
[patent_app_number] => 11/118149
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Array
(
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[patent_title] => 'Organic electronic devices having external barrier layer'
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[patent_app_country] => US
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Array
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[patent_title] => 'Light sources that use diamond nanowires'
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Array
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[patent_title] => 'Light emitting module'
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[firstpage_image] =>[orig_patent_app_number] => 11095799
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/095799 | Light emitting module | Mar 30, 2005 | Abandoned |
Array
(
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[patent_title] => 'High-voltage field effect transistor having isolation structure'
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