
Richard Sukyoon Woo
Examiner (ID: 19431)
| Most Active Art Unit | 3745 |
| Art Unit(s) | 3745, 3629, 3639 |
| Total Applications | 372 |
| Issued Applications | 301 |
| Pending Applications | 50 |
| Abandoned Applications | 21 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8888575
[patent_doc_number] => 20130161759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'METHOD FOR GROWING STRAIN-INDUCING MATERIALS IN CMOS CIRCUITS IN A GATE FIRST FLOW'
[patent_app_type] => utility
[patent_app_number] => 13/772401
[patent_app_country] => US
[patent_app_date] => 2013-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8936
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13772401
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/772401 | Method for growing strain-inducing materials in CMOS circuits in a gate first flow | Feb 20, 2013 | Issued |
Array
(
[id] => 9255175
[patent_doc_number] => 08618594
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-31
[patent_title] => 'Semiconductor device and manufacturing method of the same'
[patent_app_type] => utility
[patent_app_number] => 13/770213
[patent_app_country] => US
[patent_app_date] => 2013-02-19
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/770213 | Semiconductor device and manufacturing method of the same | Feb 18, 2013 | Issued |
Array
(
[id] => 9728812
[patent_doc_number] => 20140264519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'SWITCHING ELEMENT UNIT'
[patent_app_type] => utility
[patent_app_number] => 14/359486
[patent_app_country] => US
[patent_app_date] => 2013-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/359486 | Switching element unit | Jan 28, 2013 | Issued |
Array
(
[id] => 10883061
[patent_doc_number] => 08907444
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-09
[patent_title] => 'Stress-inducing structures, methods, and materials'
[patent_app_type] => utility
[patent_app_number] => 13/750919
[patent_app_country] => US
[patent_app_date] => 2013-01-25
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 9817
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/750919 | Stress-inducing structures, methods, and materials | Jan 24, 2013 | Issued |
Array
(
[id] => 9469604
[patent_doc_number] => 08723237
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-13
[patent_title] => 'Method for designing a semiconductor device including stress films'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/734125 | Method for designing a semiconductor device including stress films | Jan 3, 2013 | Issued |
Array
(
[id] => 8818335
[patent_doc_number] => 20130119380
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-16
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/733518
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/733518 | Semiconductor device including an oxide semiconductor layer | Jan 2, 2013 | Issued |
Array
(
[id] => 8777335
[patent_doc_number] => 20130099310
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'Trench MOS Device with Schottky Diode and Method for Manufacturing Same'
[patent_app_type] => utility
[patent_app_number] => 13/710816
[patent_app_country] => US
[patent_app_date] => 2012-12-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/710816 | Trench MOS Device with Schottky Diode and Method for Manufacturing Same | Dec 10, 2012 | Abandoned |
Array
(
[id] => 10909431
[patent_doc_number] => 20140312446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-10-23
[patent_title] => 'SEMICONDUCTOR STRUCTURE ABLE TO RECEIVE ELECTROMAGNETIC RADIATION, SEMICONDUCTOR COMPONENT AND PROCESS FOR FABRICATING SUCH A SEMICONDUCTOR STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 14/359369
[patent_app_country] => US
[patent_app_date] => 2012-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 7446
[patent_no_of_claims] => 16
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14359369
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/359369 | Semiconductor structure able to receive electromagnetic radiation, semiconductor component and process for fabricating such a semiconductor structure | Nov 26, 2012 | Issued |
Array
(
[id] => 8888511
[patent_doc_number] => 20130161695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-27
[patent_title] => 'REDUCTION OF THICKNESS VARIATIONS OF A THRESHOLD SEMICONDUCTOR ALLOY BY REDUCING PATTERNING NON-UNIFORMITIES PRIOR TO DEPOSITING THE SEMICONDUCTOR ALLOY'
[patent_app_type] => utility
[patent_app_number] => 13/671468
[patent_app_country] => US
[patent_app_date] => 2012-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13671468
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/671468 | REDUCTION OF THICKNESS VARIATIONS OF A THRESHOLD SEMICONDUCTOR ALLOY BY REDUCING PATTERNING NON-UNIFORMITIES PRIOR TO DEPOSITING THE SEMICONDUCTOR ALLOY | Nov 6, 2012 | Abandoned |
Array
(
[id] => 9432939
[patent_doc_number] => 20140110845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'DAMASCENE GAP STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/659109
[patent_app_country] => US
[patent_app_date] => 2012-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 6203
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/659109 | Damascene gap structure | Oct 23, 2012 | Issued |
Array
(
[id] => 9220350
[patent_doc_number] => 20140015125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-16
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/659181
[patent_app_country] => US
[patent_app_date] => 2012-10-24
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/659181 | Semiconductor package and method of fabricating the same | Oct 23, 2012 | Issued |
Array
(
[id] => 8987130
[patent_doc_number] => 20130214411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-22
[patent_title] => 'METAL INTERCONNECT OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/659345
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/659345 | METAL INTERCONNECT OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | Oct 23, 2012 | Abandoned |
Array
(
[id] => 10888588
[patent_doc_number] => 08912584
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-16
[patent_title] => 'PFET polysilicon layer with N-type end cap for electrical shunt'
[patent_app_type] => utility
[patent_app_number] => 13/658049
[patent_app_country] => US
[patent_app_date] => 2012-10-23
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/658049 | PFET polysilicon layer with N-type end cap for electrical shunt | Oct 22, 2012 | Issued |
Array
(
[id] => 9432804
[patent_doc_number] => 20140110710
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[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'STACKED CHIP MODULE WITH INTEGRATED CIRCUIT CHIPS HAVING INTEGRATABLE AND RECONFIGURABLE BUILT-IN SELF-MAINTENANCE BLOCKS'
[patent_app_type] => utility
[patent_app_number] => 13/656836
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[patent_app_date] => 2012-10-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656836 | Stacked chip module with integrated circuit chips having integratable and reconfigurable built-in self-maintenance blocks | Oct 21, 2012 | Issued |
Array
(
[id] => 9432805
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[patent_title] => 'STACKED CHIP MODULE WITH INTEGRATED CIRCUIT CHIPS HAVING INTEGRATABLE BUILT-IN SELF-MAINTENANCE BLOCKS'
[patent_app_type] => utility
[patent_app_number] => 13/656844
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656844 | Stacked chip module with integrated circuit chips having integratable built-in self-maintenance blocks | Oct 21, 2012 | Issued |
Array
(
[id] => 9432931
[patent_doc_number] => 20140110836
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[patent_kind] => A1
[patent_issue_date] => 2014-04-24
[patent_title] => 'Packaging Devices, Methods of Manufacture Thereof, and Packaging Methods'
[patent_app_type] => utility
[patent_app_number] => 13/656423
[patent_app_country] => US
[patent_app_date] => 2012-10-19
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656423 | Packaging devices, methods of manufacture thereof, and packaging methods | Oct 18, 2012 | Issued |
Array
(
[id] => 10837909
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[patent_kind] => B2
[patent_issue_date] => 2014-10-21
[patent_title] => 'Hybrid gate last integration scheme for multi-layer high-k gate stacks'
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[patent_app_number] => 13/656537
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656537 | Hybrid gate last integration scheme for multi-layer high-k gate stacks | Oct 18, 2012 | Issued |
Array
(
[id] => 9432817
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[patent_issue_date] => 2014-04-24
[patent_title] => 'PROCESS OF MAKING A STRUCTURE FOR ENCAPSULATING LED CHIPS AND THE LED CHIPS ENCAPSULATION STRUCTURE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/656651 | PROCESS OF MAKING A STRUCTURE FOR ENCAPSULATING LED CHIPS AND THE LED CHIPS ENCAPSULATION STRUCTURE | Oct 18, 2012 | Abandoned |
Array
(
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Array
(
[id] => 8730222
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[patent_title] => 'DEPLETED CHARGE-MULTIPLYING CCD IMAGE SENSOR'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/623316 | Depleted charge-multiplying CCD image sensor | Sep 19, 2012 | Issued |