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Ricky D Shafer

Examiner (ID: 1276, Phone: (571)272-2320 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872, 2507
Total Applications
2433
Issued Applications
1743
Pending Applications
161
Abandoned Applications
529

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2843319 [patent_doc_number] => 05175852 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Distributed file access structure lock' [patent_app_type] => 1 [patent_app_number] => 7/418750 [patent_app_country] => US [patent_app_date] => 1989-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 16550 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175852.pdf [firstpage_image] =>[orig_patent_app_number] => 418750 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/418750
Distributed file access structure lock Oct 3, 1989 Issued
Array ( [id] => 2564508 [patent_doc_number] => 04961138 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'System and apparatus for providing three dimensions of input into a host processor' [patent_app_type] => 1 [patent_app_number] => 7/418694 [patent_app_country] => US [patent_app_date] => 1989-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5596 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/961/04961138.pdf [firstpage_image] =>[orig_patent_app_number] => 418694 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/418694
System and apparatus for providing three dimensions of input into a host processor Oct 1, 1989 Issued
07/414985 FUNCTIONALLY PROGRAMMABLE PCM DATA ANALYZER AND TRANSMITTER FOR USE IN TELECOMMUNICATION EQUIPMENT Sep 27, 1989 Abandoned
Array ( [id] => 2958412 [patent_doc_number] => 05255367 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Fault tolerant, synchronized twin computer system with error checking of I/O communication' [patent_app_type] => 1 [patent_app_number] => 7/382023 [patent_app_country] => US [patent_app_date] => 1989-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 56 [patent_no_of_words] => 20125 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255367.pdf [firstpage_image] =>[orig_patent_app_number] => 382023 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/382023
Fault tolerant, synchronized twin computer system with error checking of I/O communication Jul 18, 1989 Issued
Array ( [id] => 2872498 [patent_doc_number] => 05167017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-24 [patent_title] => 'Text editing device' [patent_app_type] => 1 [patent_app_number] => 7/381156 [patent_app_country] => US [patent_app_date] => 1989-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 4124 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/167/05167017.pdf [firstpage_image] =>[orig_patent_app_number] => 381156 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/381156
Text editing device Jul 16, 1989 Issued
07/375502 ARCHIVAL, SECURE DIGITAL MEMORY SYSTEM Jul 4, 1989 Abandoned
Array ( [id] => 2691143 [patent_doc_number] => 05045998 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-03 [patent_title] => 'Method and apparatus for selectively posting write cycles using the 82385 cache controller' [patent_app_type] => 1 [patent_app_number] => 7/359794 [patent_app_country] => US [patent_app_date] => 1989-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5207 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/045/05045998.pdf [firstpage_image] =>[orig_patent_app_number] => 359794 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/359794
Method and apparatus for selectively posting write cycles using the 82385 cache controller May 31, 1989 Issued
Array ( [id] => 3062604 [patent_doc_number] => 05283868 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-01 [patent_title] => 'Providing additional system characteristics to a data processing system through operations of an application program, transparently to the operating system' [patent_app_type] => 1 [patent_app_number] => 7/353111 [patent_app_country] => US [patent_app_date] => 1989-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 84 [patent_figures_cnt] => 134 [patent_no_of_words] => 78143 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/283/05283868.pdf [firstpage_image] =>[orig_patent_app_number] => 353111 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/353111
Providing additional system characteristics to a data processing system through operations of an application program, transparently to the operating system May 16, 1989 Issued
07/344332 METHOD FOR MANIPULATING ELEMENTS WITHIN A STRUCTURED DOCUMENT USING ACTIVE INTENT INTERPRETATION Apr 25, 1989 Abandoned
07/333504 FAST LINE BREAKING ALGORITHM Apr 4, 1989 Abandoned
07/326976 METHODS AND APPARATUS FOR INFORMATION STORAGE AND RETRIEVAL Mar 21, 1989 Abandoned
07/324723 PREFETCH DATA PROCESSING SYSTEM Mar 16, 1989 Abandoned
Array ( [id] => 2769182 [patent_doc_number] => 05060144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Locking control with validity status indication for a multi-host processor system that utilizes a record lock processor and a cache memory for each host processor' [patent_app_type] => 1 [patent_app_number] => 7/324129 [patent_app_country] => US [patent_app_date] => 1989-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5318 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 1114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060144.pdf [firstpage_image] =>[orig_patent_app_number] => 324129 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/324129
Locking control with validity status indication for a multi-host processor system that utilizes a record lock processor and a cache memory for each host processor Mar 15, 1989 Issued
07/318845 INFORMATION PROCESSING SYSTEM CAPABLE OF CARRYING OUT ADVANCED EXECUTION Mar 5, 1989 Abandoned
07/316333 TRANSDUCER SYSTEM Feb 26, 1989 Abandoned
07/316331 USER INTERFACE SYSTEM AND METHOD FOR TRAVERSING A DATABASE Feb 26, 1989 Abandoned
07/315272 TRANSDUCER SYSTEM Feb 23, 1989 Abandoned
07/315006 ADAPTIVE JOB SCHEDULING FOR MULTIPROCESSING SYSTEMS Feb 23, 1989 Abandoned
07/314931 TRANSDUCER SYSTEM Feb 23, 1989 Abandoned
Array ( [id] => 2832418 [patent_doc_number] => 05168568 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-01 [patent_title] => 'Delaying arbitration of bus access in digital computers' [patent_app_type] => 1 [patent_app_number] => 7/307359 [patent_app_country] => US [patent_app_date] => 1989-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 13219 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/168/05168568.pdf [firstpage_image] =>[orig_patent_app_number] => 307359 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/307359
Delaying arbitration of bus access in digital computers Feb 5, 1989 Issued
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