Search

Robert A. Rose

Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3723, 3727, 3203, 2899
Total Applications
3154
Issued Applications
2531
Pending Applications
105
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 491379 [patent_doc_number] => 07214978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Semiconductor fabrication that includes surface tension control' [patent_app_type] => utility [patent_app_number] => 10/789800 [patent_app_country] => US [patent_app_date] => 2004-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 6012 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/214/07214978.pdf [firstpage_image] =>[orig_patent_app_number] => 10789800 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/789800
Semiconductor fabrication that includes surface tension control Feb 26, 2004 Issued
Array ( [id] => 7048450 [patent_doc_number] => 20050184337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-25 [patent_title] => '4F2 EEPROM NROM MEMORY ARRAYS WITH VERTICAL DEVICES' [patent_app_type] => utility [patent_app_number] => 10/785310 [patent_app_country] => US [patent_app_date] => 2004-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10407 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20050184337.pdf [firstpage_image] =>[orig_patent_app_number] => 10785310 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/785310
4F2 EEPROM NROM memory arrays with vertical devices Feb 23, 2004 Issued
Array ( [id] => 6915484 [patent_doc_number] => 20050093045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'NONVOLATILE MEMORY AND ERASING METHOD' [patent_app_type] => utility [patent_app_number] => 10/782916 [patent_app_country] => US [patent_app_date] => 2004-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4078 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20050093045.pdf [firstpage_image] =>[orig_patent_app_number] => 10782916 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/782916
Nonvolatile memory and erasing method Feb 22, 2004 Issued
Array ( [id] => 7448308 [patent_doc_number] => 20040164381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Method and structure of diode' [patent_app_type] => new [patent_app_number] => 10/781879 [patent_app_country] => US [patent_app_date] => 2004-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20040164381.pdf [firstpage_image] =>[orig_patent_app_number] => 10781879 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781879
Method and structure of diode Feb 19, 2004 Issued
Array ( [id] => 730063 [patent_doc_number] => 07042044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-09 [patent_title] => 'Nor-type channel-program channel-erase contactless flash memory on SOI' [patent_app_type] => utility [patent_app_number] => 10/781112 [patent_app_country] => US [patent_app_date] => 2004-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 16422 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/042/07042044.pdf [firstpage_image] =>[orig_patent_app_number] => 10781112 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781112
Nor-type channel-program channel-erase contactless flash memory on SOI Feb 17, 2004 Issued
Array ( [id] => 7414626 [patent_doc_number] => 20040159863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Graded composition metal oxide tunnel barrier interpoly insulators' [patent_app_type] => new [patent_app_number] => 10/781035 [patent_app_country] => US [patent_app_date] => 2004-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14930 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20040159863.pdf [firstpage_image] =>[orig_patent_app_number] => 10781035 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/781035
Graded composition metal oxide tunnel barrier interpoly insulators Feb 17, 2004 Issued
Array ( [id] => 7414765 [patent_doc_number] => 20040159879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Non-volatile semiconductor memory device and manufacturing method of the same' [patent_app_type] => new [patent_app_number] => 10/778204 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6899 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20040159879.pdf [firstpage_image] =>[orig_patent_app_number] => 10778204 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/778204
Non-volatile semiconductor memory device and manufacturing method of the same Feb 16, 2004 Issued
Array ( [id] => 938662 [patent_doc_number] => 06972491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-06 [patent_title] => 'Semiconductor device including multi-layered interconnection and method of manufacturing the device' [patent_app_type] => utility [patent_app_number] => 10/778180 [patent_app_country] => US [patent_app_date] => 2004-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 8705 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/972/06972491.pdf [firstpage_image] =>[orig_patent_app_number] => 10778180 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/778180
Semiconductor device including multi-layered interconnection and method of manufacturing the device Feb 16, 2004 Issued
Array ( [id] => 7114313 [patent_doc_number] => 20050067613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-31 [patent_title] => 'Nitride-based semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/776270 [patent_app_country] => US [patent_app_date] => 2004-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5330 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20050067613.pdf [firstpage_image] =>[orig_patent_app_number] => 10776270 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776270
Nitride-based semiconductor device Feb 11, 2004 Issued
Array ( [id] => 7250255 [patent_doc_number] => 20040238932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Array printed circuit board' [patent_app_type] => new [patent_app_number] => 10/775070 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2373 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20040238932.pdf [firstpage_image] =>[orig_patent_app_number] => 10775070 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775070
Array printed circuit board Feb 10, 2004 Issued
Array ( [id] => 6910013 [patent_doc_number] => 20050173771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-08-11 [patent_title] => 'SWITCHING OF SOFT REFERENCE LAYERS OF MAGNETIC MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 10/776580 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2863 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20050173771.pdf [firstpage_image] =>[orig_patent_app_number] => 10776580 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776580
Switching of soft reference layers of magnetic memory devices Feb 10, 2004 Issued
Array ( [id] => 7314239 [patent_doc_number] => 20040222439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Optical power monitoring for a semiconductor laser device' [patent_app_type] => new [patent_app_number] => 10/775910 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1730 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222439.pdf [firstpage_image] =>[orig_patent_app_number] => 10775910 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775910
Optical power monitoring for a semiconductor laser device Feb 9, 2004 Issued
Array ( [id] => 484403 [patent_doc_number] => 07221018 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-22 [patent_title] => 'NROM flash memory with a high-permittivity gate dielectric' [patent_app_type] => utility [patent_app_number] => 10/775908 [patent_app_country] => US [patent_app_date] => 2004-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4197 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/221/07221018.pdf [firstpage_image] =>[orig_patent_app_number] => 10775908 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/775908
NROM flash memory with a high-permittivity gate dielectric Feb 9, 2004 Issued
Array ( [id] => 717129 [patent_doc_number] => 07053455 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-05-30 [patent_title] => 'Semiconductor device and method of manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/772280 [patent_app_country] => US [patent_app_date] => 2004-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5636 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/053/07053455.pdf [firstpage_image] =>[orig_patent_app_number] => 10772280 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/772280
Semiconductor device and method of manufacturing semiconductor device Feb 5, 2004 Issued
Array ( [id] => 1025493 [patent_doc_number] => 06885054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-26 [patent_title] => 'Threshold voltage stabilizer, method of manufacturing and integrated circuit employing the same' [patent_app_type] => utility [patent_app_number] => 10/772210 [patent_app_country] => US [patent_app_date] => 2004-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4128 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885054.pdf [firstpage_image] =>[orig_patent_app_number] => 10772210 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/772210
Threshold voltage stabilizer, method of manufacturing and integrated circuit employing the same Feb 3, 2004 Issued
Array ( [id] => 954097 [patent_doc_number] => 06958512 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-10-25 [patent_title] => 'Non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 10/770010 [patent_app_country] => US [patent_app_date] => 2004-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 4284 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/958/06958512.pdf [firstpage_image] =>[orig_patent_app_number] => 10770010 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/770010
Non-volatile memory device Feb 2, 2004 Issued
Array ( [id] => 1031437 [patent_doc_number] => 06878991 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-04-12 [patent_title] => 'Vertical device 4F2 EEPROM memory' [patent_app_type] => utility [patent_app_number] => 10/769116 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 9746 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/878/06878991.pdf [firstpage_image] =>[orig_patent_app_number] => 10769116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/769116
Vertical device 4F2 EEPROM memory Jan 29, 2004 Issued
Array ( [id] => 979320 [patent_doc_number] => 06930325 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Test structure for improved vertical memory arrays' [patent_app_type] => utility [patent_app_number] => 10/766902 [patent_app_country] => US [patent_app_date] => 2004-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930325.pdf [firstpage_image] =>[orig_patent_app_number] => 10766902 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766902
Test structure for improved vertical memory arrays Jan 29, 2004 Issued
Array ( [id] => 7338714 [patent_doc_number] => 20040245653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Flip chip package having protective cap and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 10/766210 [patent_app_country] => US [patent_app_date] => 2004-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3622 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245653.pdf [firstpage_image] =>[orig_patent_app_number] => 10766210 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766210
Flip chip package having protective cap and method of fabricating the same Jan 28, 2004 Abandoned
Array ( [id] => 539924 [patent_doc_number] => 07176545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Apparatus and methods for maskless pattern generation' [patent_app_type] => utility [patent_app_number] => 10/766629 [patent_app_country] => US [patent_app_date] => 2004-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 106 [patent_no_of_words] => 27007 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/176/07176545.pdf [firstpage_image] =>[orig_patent_app_number] => 10766629 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/766629
Apparatus and methods for maskless pattern generation Jan 26, 2004 Issued
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