
Robert A. Rose
Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )
| Most Active Art Unit | 3723 |
| Art Unit(s) | 3723, 3727, 3203, 2899 |
| Total Applications | 3154 |
| Issued Applications | 2531 |
| Pending Applications | 105 |
| Abandoned Applications | 520 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17143091
[patent_doc_number] => 20210311104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => DEFECT DETECTION STRUCTURES, SEMICONDUCTOR DEVICES INCLUDING THE SAME, AND METHODS OF DETECTING DEFECTS IN SEMICONDUCTOR DIES
[patent_app_type] => utility
[patent_app_number] => 17/061380
[patent_app_country] => US
[patent_app_date] => 2020-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11248
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17061380
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/061380 | Defect detection structures, semiconductor devices including the same, and methods of detecting defects in semiconductor dies | Sep 30, 2020 | Issued |
Array
(
[id] => 17638195
[patent_doc_number] => 11348929
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Memory device and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/035298
[patent_app_country] => US
[patent_app_date] => 2020-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 45
[patent_figures_cnt] => 47
[patent_no_of_words] => 10636
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035298
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/035298 | Memory device and method for forming the same | Sep 27, 2020 | Issued |
Array
(
[id] => 17925881
[patent_doc_number] => 11469143
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Semiconductor device with elongated pattern
[patent_app_type] => utility
[patent_app_number] => 17/033256
[patent_app_country] => US
[patent_app_date] => 2020-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 105
[patent_figures_cnt] => 105
[patent_no_of_words] => 19109
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033256
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/033256 | Semiconductor device with elongated pattern | Sep 24, 2020 | Issued |
Array
(
[id] => 17848046
[patent_doc_number] => 11437432
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Embedded device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/028034
[patent_app_country] => US
[patent_app_date] => 2020-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 29
[patent_no_of_words] => 12151
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028034
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/028034 | Embedded device and method of manufacturing the same | Sep 21, 2020 | Issued |
Array
(
[id] => 17825824
[patent_doc_number] => 11430779
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Semiconductor device and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/028855
[patent_app_country] => US
[patent_app_date] => 2020-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 29
[patent_no_of_words] => 11977
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17028855
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/028855 | Semiconductor device and method of fabricating the same | Sep 21, 2020 | Issued |
Array
(
[id] => 16905034
[patent_doc_number] => 20210183950
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => VARIABLE RESISTANCE MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/027992
[patent_app_country] => US
[patent_app_date] => 2020-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9898
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 257
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17027992
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/027992 | Variable resistance memory devices | Sep 21, 2020 | Issued |
Array
(
[id] => 17623277
[patent_doc_number] => 11342341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-24
[patent_title] => Integrated circuit layout, method, structure, and system
[patent_app_type] => utility
[patent_app_number] => 17/025563
[patent_app_country] => US
[patent_app_date] => 2020-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 19
[patent_no_of_words] => 19185
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17025563
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/025563 | Integrated circuit layout, method, structure, and system | Sep 17, 2020 | Issued |
Array
(
[id] => 17803325
[patent_doc_number] => 11417638
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-16
[patent_title] => Semiconductor structures
[patent_app_type] => utility
[patent_app_number] => 17/023379
[patent_app_country] => US
[patent_app_date] => 2020-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 29
[patent_no_of_words] => 7899
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023379
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/023379 | Semiconductor structures | Sep 16, 2020 | Issued |
Array
(
[id] => 16545084
[patent_doc_number] => 20200411499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-31
[patent_title] => PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/022064
[patent_app_country] => US
[patent_app_date] => 2020-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11576
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022064
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/022064 | Package structure | Sep 14, 2020 | Issued |
Array
(
[id] => 16545087
[patent_doc_number] => 20200411502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-31
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/014662
[patent_app_country] => US
[patent_app_date] => 2020-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8873
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014662
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/014662 | Semiconductor device | Sep 7, 2020 | Issued |
Array
(
[id] => 17700259
[patent_doc_number] => 11373993
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-28
[patent_title] => Integrated standard cell structure
[patent_app_type] => utility
[patent_app_number] => 17/012415
[patent_app_country] => US
[patent_app_date] => 2020-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 19
[patent_no_of_words] => 8493
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012415
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/012415 | Integrated standard cell structure | Sep 3, 2020 | Issued |
Array
(
[id] => 17652773
[patent_doc_number] => 11355513
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-07
[patent_title] => Semiconductor storage device
[patent_app_type] => utility
[patent_app_number] => 17/013229
[patent_app_country] => US
[patent_app_date] => 2020-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 78
[patent_no_of_words] => 11964
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013229
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/013229 | Semiconductor storage device | Sep 3, 2020 | Issued |
Array
(
[id] => 17448696
[patent_doc_number] => 20220069201
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/008000
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8111
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008000
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/008000 | Semiconductor device and manufacturing method thereof | Aug 30, 2020 | Issued |
Array
(
[id] => 17772525
[patent_doc_number] => 11404477
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Memory array and method of forming thereof
[patent_app_type] => utility
[patent_app_number] => 17/008032
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 16
[patent_no_of_words] => 9058
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008032
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/008032 | Memory array and method of forming thereof | Aug 30, 2020 | Issued |
Array
(
[id] => 17332378
[patent_doc_number] => 11222846
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-01-11
[patent_title] => Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods
[patent_app_type] => utility
[patent_app_number] => 17/002486
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 11741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002486
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002486 | Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods | Aug 24, 2020 | Issued |
Array
(
[id] => 17332378
[patent_doc_number] => 11222846
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-01-11
[patent_title] => Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods
[patent_app_type] => utility
[patent_app_number] => 17/002486
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 11741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002486
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002486 | Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods | Aug 24, 2020 | Issued |
Array
(
[id] => 17332378
[patent_doc_number] => 11222846
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-01-11
[patent_title] => Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods
[patent_app_type] => utility
[patent_app_number] => 17/002486
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 11741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002486
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002486 | Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods | Aug 24, 2020 | Issued |
Array
(
[id] => 16677516
[patent_doc_number] => 20210066282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/002149
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12772
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002149
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002149 | Three-dimensional semiconductor memory device | Aug 24, 2020 | Issued |
Array
(
[id] => 17332378
[patent_doc_number] => 11222846
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-01-11
[patent_title] => Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods
[patent_app_type] => utility
[patent_app_number] => 17/002486
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 15
[patent_no_of_words] => 11741
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002486
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/002486 | Static random access memory (SRAM) bit cells employing asymmetric width read and write word lines, and related methods | Aug 24, 2020 | Issued |
Array
(
[id] => 16471790
[patent_doc_number] => 20200373328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/993627
[patent_app_country] => US
[patent_app_date] => 2020-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4843
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993627
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/993627 | Semiconductor device and method of manufacturing the same | Aug 13, 2020 | Issued |