Search

Robert A. Rose

Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3723, 3727, 3203, 2899
Total Applications
3154
Issued Applications
2531
Pending Applications
105
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16217534 [patent_doc_number] => 10733348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Tined gate to control threshold voltage in a device formed of materials having piezoelectric properties [patent_app_type] => utility [patent_app_number] => 16/014942 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 27 [patent_no_of_words] => 12317 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014942 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/014942
Tined gate to control threshold voltage in a device formed of materials having piezoelectric properties Jun 20, 2018 Issued
Array ( [id] => 15299983 [patent_doc_number] => 20190393127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => SEMICONDUCTOR PACKAGE WITH INTEGRATED HEAT SINK [patent_app_type] => utility [patent_app_number] => 16/013397 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013397 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013397
SEMICONDUCTOR PACKAGE WITH INTEGRATED HEAT SINK Jun 19, 2018 Abandoned
Array ( [id] => 15300405 [patent_doc_number] => 20190393338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => EXTENDED DRAIN MOSFETS (EDMOS) [patent_app_type] => utility [patent_app_number] => 16/013336 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013336
Extended drain MOSFETs (EDMOS) Jun 19, 2018 Issued
Array ( [id] => 14398125 [patent_doc_number] => 10312356 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-06-04 [patent_title] => Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions [patent_app_type] => utility [patent_app_number] => 16/013363 [patent_app_country] => US [patent_app_date] => 2018-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16013363 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/013363
Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions Jun 19, 2018 Issued
Array ( [id] => 15274949 [patent_doc_number] => 20190386209 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => PERPENDICULAR SPIN TRANSFER TORQUE DEVICES WITH IMPROVED RETENTION AND THERMAL STABILITY [patent_app_type] => utility [patent_app_number] => 16/009776 [patent_app_country] => US [patent_app_date] => 2018-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11469 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16009776 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/009776
Perpendicular spin transfer torque devices with improved retention and thermal stability Jun 14, 2018 Issued
Array ( [id] => 14558233 [patent_doc_number] => 10347587 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-09 [patent_title] => Electronic device and electromagnetic shielding device [patent_app_type] => utility [patent_app_number] => 16/008524 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3981 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008524 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008524
Electronic device and electromagnetic shielding device Jun 13, 2018 Issued
Array ( [id] => 14769495 [patent_doc_number] => 10396151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-27 [patent_title] => Vertical field effect transistor with reduced gate to source/drain capacitance [patent_app_type] => utility [patent_app_number] => 16/008687 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6341 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008687 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008687
Vertical field effect transistor with reduced gate to source/drain capacitance Jun 13, 2018 Issued
Array ( [id] => 14985465 [patent_doc_number] => 10446654 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-15 [patent_title] => Gate contact structures and self-aligned contact process [patent_app_type] => utility [patent_app_number] => 16/008711 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 2586 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008711 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008711
Gate contact structures and self-aligned contact process Jun 13, 2018 Issued
Array ( [id] => 14859621 [patent_doc_number] => 10418547 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-17 [patent_title] => Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode [patent_app_type] => utility [patent_app_number] => 16/008629 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008629 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008629
Sub 60nm etchless MRAM devices by ion beam etching fabricated T-shaped bottom electrode Jun 13, 2018 Issued
Array ( [id] => 13528677 [patent_doc_number] => 20180315881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => Materials, fabrication equipment, and methods for stable, sensitive photodetectors and image sensors made therefrom [patent_app_type] => utility [patent_app_number] => 16/008070 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008070
Materials, fabrication equipment, and methods for stable, sensitive photodetectors and image sensors made therefrom Jun 13, 2018 Issued
Array ( [id] => 15274933 [patent_doc_number] => 20190386201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => Under-Cut Via Electrode for Sub 60nm Etchless MRAM Devices by Decoupling the Via Etch Process [patent_app_type] => utility [patent_app_number] => 16/008650 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2046 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008650 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008650
Under-cut via electrode for sub 60nm etchless MRAM devices by decoupling the via etch process Jun 13, 2018 Issued
Array ( [id] => 14422255 [patent_doc_number] => 10315916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-11 [patent_title] => Microelectromechanical device with at least one translationally guided moveable element [patent_app_type] => utility [patent_app_number] => 16/008578 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 6376 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008578
Microelectromechanical device with at least one translationally guided moveable element Jun 13, 2018 Issued
Array ( [id] => 14252693 [patent_doc_number] => 10276554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-30 [patent_title] => Integrated standard cell structure [patent_app_type] => utility [patent_app_number] => 16/008563 [patent_app_country] => US [patent_app_date] => 2018-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16008563 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/008563
Integrated standard cell structure Jun 13, 2018 Issued
Array ( [id] => 13543199 [patent_doc_number] => 20180323146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-08 [patent_title] => MULTI-DIE INDUCTORS WITH COUPLED THROUGH-SUBSTRATE VIA CORES [patent_app_type] => utility [patent_app_number] => 16/007670 [patent_app_country] => US [patent_app_date] => 2018-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16007670 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/007670
Multi-die inductors with coupled through-substrate via cores Jun 12, 2018 Issued
Array ( [id] => 14707233 [patent_doc_number] => 10381376 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Three-dimensional flat NAND memory device including concave word lines and method of making the same [patent_app_type] => utility [patent_app_number] => 16/002294 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 49 [patent_no_of_words] => 15961 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002294 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/002294
Three-dimensional flat NAND memory device including concave word lines and method of making the same Jun 6, 2018 Issued
Array ( [id] => 13878945 [patent_doc_number] => 20190035813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/002317 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/002317
Display substrate, method for manufacturing the same and display device Jun 6, 2018 Issued
Array ( [id] => 14558345 [patent_doc_number] => 10347643 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-07-09 [patent_title] => Methods of forming integrated assemblies having dielectric regions along conductive structures [patent_app_type] => utility [patent_app_number] => 16/002890 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 4381 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/002890
Methods of forming integrated assemblies having dielectric regions along conductive structures Jun 6, 2018 Issued
Array ( [id] => 14887687 [patent_doc_number] => 10423888 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-24 [patent_title] => Frequency allocation in multi-qubit circuits [patent_app_type] => utility [patent_app_number] => 16/002817 [patent_app_country] => US [patent_app_date] => 2018-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11398 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16002817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/002817
Frequency allocation in multi-qubit circuits Jun 6, 2018 Issued
Array ( [id] => 14080029 [patent_doc_number] => 20190088902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-21 [patent_title] => DISPLAY BACKPLANE AND MANUFACTURE METHOD THEREOF, DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/994352 [patent_app_country] => US [patent_app_date] => 2018-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15994352 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/994352
Display backplane and manufacture method thereof, display device May 30, 2018 Issued
Array ( [id] => 13451975 [patent_doc_number] => 20180277530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => METHODS FOR PROCESSING A 3D SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/990626 [patent_app_country] => US [patent_app_date] => 2018-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15990626 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/990626
Methods for processing a 3D semiconductor device May 25, 2018 Issued
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