Search

Robert A. Rose

Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3723, 3727, 3203, 2899
Total Applications
3154
Issued Applications
2531
Pending Applications
105
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8462462 [patent_doc_number] => 20120267631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'ARRAY SUBSTRATE FOR DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/543474 [patent_app_country] => US [patent_app_date] => 2012-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6145 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543474 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543474
Array substrate for display device and method for fabricating the same Jul 5, 2012 Issued
Array ( [id] => 8474518 [patent_doc_number] => 20120273925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'PATTERNED DOPING OF SEMICONDUCTOR SUBSTRATES USING PHOTOSENSITIVE MONOLAYERS' [patent_app_type] => utility [patent_app_number] => 13/541857 [patent_app_country] => US [patent_app_date] => 2012-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13541857 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/541857
Patterned doping of semiconductor substrates using photosensitive monolayers Jul 4, 2012 Issued
Array ( [id] => 9663033 [patent_doc_number] => 08810017 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/536321 [patent_app_country] => US [patent_app_date] => 2012-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 49 [patent_no_of_words] => 11084 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13536321 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/536321
Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof Jun 27, 2012 Issued
Array ( [id] => 9355873 [patent_doc_number] => 08674411 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Semiconductor device employing circuit blocks having the same characteristics' [patent_app_type] => utility [patent_app_number] => 13/517690 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 37 [patent_no_of_words] => 13860 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517690 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/517690
Semiconductor device employing circuit blocks having the same characteristics Jun 13, 2012 Issued
Array ( [id] => 9469674 [patent_doc_number] => 08723309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Integrated circuit packaging system with through silicon via and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/517897 [patent_app_country] => US [patent_app_date] => 2012-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6504 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517897 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/517897
Integrated circuit packaging system with through silicon via and method of manufacture thereof Jun 13, 2012 Issued
Array ( [id] => 9195295 [patent_doc_number] => 20130334610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'N-CHANNEL AND P-CHANNEL END-TO-END FINFET CELL ARCHITECTURE WITH RELAXED GATE PITCH' [patent_app_type] => utility [patent_app_number] => 13/495810 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 16687 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495810
N-channel and P-channel end-to-end finFET cell architecture with relaxed gate pitch Jun 12, 2012 Issued
Array ( [id] => 9195358 [patent_doc_number] => 20130334673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'FLEXIBLE POWER MODULE SEMICONDUCTOR PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/495916 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3010 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495916 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495916
Flexible power module semiconductor packages Jun 12, 2012 Issued
Array ( [id] => 8519708 [patent_doc_number] => 20120319116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'SEMICONDUCTOR ELEMENT, METHOD FOR MANUFACTURING SAME, DISPLAY DEVICE, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/495820 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 17921 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495820 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495820
Semiconductor element, method for manufacturing same, display device, and electronic device Jun 12, 2012 Issued
Array ( [id] => 9711473 [patent_doc_number] => 08836049 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Semiconductor structure and process thereof' [patent_app_type] => utility [patent_app_number] => 13/495009 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3443 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495009 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495009
Semiconductor structure and process thereof Jun 12, 2012 Issued
Array ( [id] => 8519798 [patent_doc_number] => 20120319206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'INTEGRATED CIRCUIT COMPRISING AN ISOLATING TRENCH AND CORRESPONDING METHOD' [patent_app_type] => utility [patent_app_number] => 13/495919 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3482 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495919 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495919
Integrated circuit comprising an isolating trench and corresponding method Jun 12, 2012 Issued
Array ( [id] => 8462520 [patent_doc_number] => 20120267688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE, AND METHOD FOR PRODUCING SEMICONDUCTOR WAFER' [patent_app_type] => utility [patent_app_number] => 13/495746 [patent_app_country] => US [patent_app_date] => 2012-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9557 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13495746 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/495746
Semiconductor wafer, semiconductor device, and method for producing semiconductor wafer Jun 12, 2012 Issued
Array ( [id] => 9389171 [patent_doc_number] => 08685768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Organic light emitting diodes and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/494532 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 5641 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494532 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494532
Organic light emitting diodes and methods of manufacturing the same Jun 11, 2012 Issued
Array ( [id] => 9245957 [patent_doc_number] => 08610241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Homo-junction diode structures using fin field effect transistor processing' [patent_app_type] => utility [patent_app_number] => 13/494795 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 5204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494795 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494795
Homo-junction diode structures using fin field effect transistor processing Jun 11, 2012 Issued
Array ( [id] => 9188906 [patent_doc_number] => 20130328221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'Alignment mark design for semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/494879 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 4446 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494879 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494879
Alignment mark design for semiconductor device Jun 11, 2012 Issued
Array ( [id] => 9345560 [patent_doc_number] => 08664710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Non-volatile memory and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/494720 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 2755 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494720 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494720
Non-volatile memory and manufacturing method thereof Jun 11, 2012 Issued
Array ( [id] => 9188861 [patent_doc_number] => 20130328176 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-12 [patent_title] => 'EMI-SHIELDED SEMICONDUCTOR DEVICES AND METHODS OF MAKING' [patent_app_type] => utility [patent_app_number] => 13/493576 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493576 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/493576
EMI-shielded semiconductor devices and methods of making Jun 10, 2012 Issued
Array ( [id] => 8513668 [patent_doc_number] => 20120313076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'LOW DROOP LIGHT EMITTING DIODE STRUCTURE ON GALLIUM NITRIDE SEMIPOLAR SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/493430 [patent_app_country] => US [patent_app_date] => 2012-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13493430 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/493430
Low droop light emitting diode structure on gallium nitride semipolar substrates Jun 10, 2012 Issued
Array ( [id] => 9081244 [patent_doc_number] => 20130266774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'PACKAGE STRUCTURE AND PACKAGING METHOD' [patent_app_type] => utility [patent_app_number] => 13/491024 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2131 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491024 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/491024
PACKAGE STRUCTURE AND PACKAGING METHOD Jun 6, 2012 Abandoned
Array ( [id] => 8519745 [patent_doc_number] => 20120319153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'ENCAPSULATING SHEET AND OPTICAL SEMICONDUCTOR ELEMENT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/491051 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 20445 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491051 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/491051
Encapsulating sheet and optical semiconductor element device Jun 6, 2012 Issued
Array ( [id] => 9239666 [patent_doc_number] => 08604459 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-10 [patent_title] => 'Electrical devices containing a carbon nanotube switching layer with a passivation layer disposed thereon and methods for production thereof' [patent_app_type] => utility [patent_app_number] => 13/491550 [patent_app_country] => US [patent_app_date] => 2012-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6658 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13491550 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/491550
Electrical devices containing a carbon nanotube switching layer with a passivation layer disposed thereon and methods for production thereof Jun 6, 2012 Issued
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