Search

Robert A. Rose

Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3723, 3727, 3203, 2899
Total Applications
3154
Issued Applications
2531
Pending Applications
105
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20217621 [patent_doc_number] => 12414290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Integrated circuit device [patent_app_type] => utility [patent_app_number] => 18/084190 [patent_app_country] => US [patent_app_date] => 2022-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7079 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18084190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/084190
Integrated circuit device Dec 18, 2022 Issued
Array ( [id] => 19414810 [patent_doc_number] => 12080647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Integrated circuit, system and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/065963 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 35 [patent_no_of_words] => 28430 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18065963 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/065963
Integrated circuit, system and method of forming the same Dec 13, 2022 Issued
Array ( [id] => 20418314 [patent_doc_number] => 12501618 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Semiconductor devices and data storage systems including the same [patent_app_type] => utility [patent_app_number] => 18/062251 [patent_app_country] => US [patent_app_date] => 2022-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 8990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18062251 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/062251
Semiconductor devices and data storage systems including the same Dec 5, 2022 Issued
Array ( [id] => 20332852 [patent_doc_number] => 12463137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Integrated circuit device with interconnects made of layered topological materials [patent_app_type] => utility [patent_app_number] => 18/060979 [patent_app_country] => US [patent_app_date] => 2022-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 1122 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/060979
Integrated circuit device with interconnects made of layered topological materials Dec 1, 2022 Issued
Array ( [id] => 18745610 [patent_doc_number] => 20230354604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/072312 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18072312 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/072312
SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME Nov 29, 2022 Abandoned
Array ( [id] => 20455992 [patent_doc_number] => 12519054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Wire bonded semiconductor device package [patent_app_type] => utility [patent_app_number] => 18/071164 [patent_app_country] => US [patent_app_date] => 2022-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 3478 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071164 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071164
Wire bonded semiconductor device package Nov 28, 2022 Issued
Array ( [id] => 19964881 [patent_doc_number] => 12334400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Semiconductor structure and method of forming thereof [patent_app_type] => utility [patent_app_number] => 18/059398 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 29 [patent_no_of_words] => 2105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18059398 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/059398
Semiconductor structure and method of forming thereof Nov 27, 2022 Issued
Array ( [id] => 20332845 [patent_doc_number] => 12463130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Wrap around metal via structure [patent_app_type] => utility [patent_app_number] => 17/989932 [patent_app_country] => US [patent_app_date] => 2022-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989932 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989932
Wrap around metal via structure Nov 17, 2022 Issued
Array ( [id] => 19183806 [patent_doc_number] => 11990407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Semiconductor device and wiring structure [patent_app_type] => utility [patent_app_number] => 18/056684 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 10191 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056684
Semiconductor device and wiring structure Nov 16, 2022 Issued
Array ( [id] => 19443358 [patent_doc_number] => 12093627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Semiconductor device, and method of forming same [patent_app_type] => utility [patent_app_number] => 18/053602 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 10730 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18053602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/053602
Semiconductor device, and method of forming same Nov 7, 2022 Issued
Array ( [id] => 18363347 [patent_doc_number] => 20230144938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => MEMORY CELL ARRAY INCLUDING PARTITIONED DUAL LINE STRUCTURE AND DESIGN METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/052412 [patent_app_country] => US [patent_app_date] => 2022-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18052412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/052412
Memory cell array including partitioned dual line structure and design method thereof Nov 2, 2022 Issued
Array ( [id] => 19305727 [patent_doc_number] => 20240234307 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/048858 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048858
Device and method of manufacturing the same Oct 23, 2022 Issued
Array ( [id] => 19305727 [patent_doc_number] => 20240234307 [patent_country] => US [patent_kind] => A9 [patent_issue_date] => 2024-07-11 [patent_title] => DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/048858 [patent_app_country] => US [patent_app_date] => 2022-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048858
Device and method of manufacturing the same Oct 23, 2022 Issued
Array ( [id] => 19314589 [patent_doc_number] => 12040416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Far-infrared sensor packaging structure [patent_app_type] => utility [patent_app_number] => 17/955854 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 6457 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955854
Far-infrared sensor packaging structure Sep 28, 2022 Issued
Array ( [id] => 18774367 [patent_doc_number] => 20230369198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => INTEGRATED CIRCUIT (IC) DIE COMPRISING GALVANIC ISOLATION CAPACITOR [patent_app_type] => utility [patent_app_number] => 17/936316 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936316 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936316
INTEGRATED CIRCUIT (IC) DIE COMPRISING GALVANIC ISOLATION CAPACITOR Sep 27, 2022 Pending
Array ( [id] => 19071181 [patent_doc_number] => 20240105607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => BURIED POWER RAIL DIRECTLY CONTACTING BACKSIDE POWER DELIVERY NETWORK [patent_app_type] => utility [patent_app_number] => 17/935331 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17935331 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/935331
Buried power rail directly contacting backside power delivery network Sep 25, 2022 Issued
Array ( [id] => 18983650 [patent_doc_number] => 11908839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => 3D semiconductor device, structure and methods with connectivity structures [patent_app_type] => utility [patent_app_number] => 17/947752 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 76 [patent_no_of_words] => 24971 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947752 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947752
3D semiconductor device, structure and methods with connectivity structures Sep 18, 2022 Issued
Array ( [id] => 19054824 [patent_doc_number] => 20240096793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => NON-PLANAR METAL-INSULATOR-METAL STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/933078 [patent_app_country] => US [patent_app_date] => 2022-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6118 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17933078 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/933078
Non-planar metal-insulator-metal structure Sep 15, 2022 Issued
Array ( [id] => 19054832 [patent_doc_number] => 20240096801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => POWER DELIVERY NETWORK HAVING SUPER VIAS IN AN INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/932327 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17932327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/932327
POWER DELIVERY NETWORK HAVING SUPER VIAS IN AN INTEGRATED CIRCUIT Sep 14, 2022 Pending
Array ( [id] => 19023144 [patent_doc_number] => 20240079315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => VIA ANCHOR PROFILE CONTROL [patent_app_type] => utility [patent_app_number] => 17/901442 [patent_app_country] => US [patent_app_date] => 2022-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5616 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17901442 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/901442
Via anchor profile control Aug 31, 2022 Issued
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